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22
23/// \file adl_defines.h
24/// \brief Contains all definitions exposed by ADL for \WIN platforms.\n <b>Included in ADL SDK</b>
25///
26/// This file contains all definitions used by ADL.
27/// The ADL definitions include the following:
28/// \li ADL error codes
29/// \li Enumerations for the ADLDisplayInfo structure
30/// \li Maximum limits
31///
32
33#ifndef ADL_DEFINES_H_
34#define ADL_DEFINES_H_
35
36/// \defgroup DEFINES Constants and Definitions
37/// @{
38
39/// \defgroup define_misc Miscellaneous Constant Definitions
40/// @{
41
42/// \name General Definitions
43/// @{
44
45/// Defines ADL_TRUE
46#define ADL_TRUE 1
47/// Defines ADL_FALSE
48#define ADL_FALSE 0
49
50/// Defines the maximum string length
51#define ADL_MAX_CHAR 4096
52/// Defines the maximum string length
53#define ADL_MAX_PATH 256
54/// Defines the maximum number of supported adapters
55#define ADL_MAX_ADAPTERS 250
56/// Defines the maxumum number of supported displays
57#define ADL_MAX_DISPLAYS 150
58/// Defines the maxumum string length for device name
59#define ADL_MAX_DEVICENAME 32
60/// Defines for all adapters
61#define ADL_ADAPTER_INDEX_ALL -1
62/// Defines APIs with iOption none
63#define ADL_MAIN_API_OPTION_NONE 0
64/// Defines the maximum of RPC endpoint
65#define ADL_MAX_RPC_ENDPOINT 32
66/// @}
67
68/// \name Definitions for iOption parameter used by
69/// ADL_Display_DDCBlockAccess_Get()
70/// @{
71
72/// Switch to DDC line 2 before sending the command to the display.
73#define ADL_DDC_OPTION_SWITCHDDC2 0x00000001
74/// Save command in the registry under a unique key, corresponding to parameter \b iCommandIndex
75#define ADL_DDC_OPTION_RESTORECOMMAND 0x00000002
76/// Combine write-read DDC block access command.
77#define ADL_DDC_OPTION_COMBOWRITEREAD 0x00000010
78/// Direct DDC access to the immediate device connected to graphics card.
79/// MST with this option set: DDC command is sent to first branch.
80/// MST with this option not set: DDC command is sent to the end node sink device.
81#define ADL_DDC_OPTION_SENDTOIMMEDIATEDEVICE 0x00000020
82/// @}
83
84/// \name Values for
85/// ADLI2C.iAction used with ADL_Display_WriteAndReadI2C()
86/// @{
87
88#define ADL_DL_I2C_ACTIONREAD 0x00000001
89#define ADL_DL_I2C_ACTIONWRITE 0x00000002
90#define ADL_DL_I2C_ACTIONREAD_REPEATEDSTART 0x00000003
91#define ADL_DL_I2C_ACTIONIS_PRESENT 0x00000004
92/// @}
93
94
95/// @} //Misc
96
97/// \defgroup define_adl_results Result Codes
98/// This group of definitions are the various results returned by all ADL functions \n
99/// @{
100/// All OK, but need to wait
101#define ADL_OK_WAIT 4
102/// All OK, but need restart
103#define ADL_OK_RESTART 3
104/// All OK but need mode change
105#define ADL_OK_MODE_CHANGE 2
106/// All OK, but with warning
107#define ADL_OK_WARNING 1
108/// ADL function completed successfully
109#define ADL_OK 0
110/// Generic Error. Most likely one or more of the Escape calls to the driver failed!
111#define ADL_ERR -1
112/// ADL not initialized
113#define ADL_ERR_NOT_INIT -2
114/// One of the parameter passed is invalid
115#define ADL_ERR_INVALID_PARAM -3
116/// One of the parameter size is invalid
117#define ADL_ERR_INVALID_PARAM_SIZE -4
118/// Invalid ADL index passed
119#define ADL_ERR_INVALID_ADL_IDX -5
120/// Invalid controller index passed
121#define ADL_ERR_INVALID_CONTROLLER_IDX -6
122/// Invalid display index passed
123#define ADL_ERR_INVALID_DIPLAY_IDX -7
124/// Function not supported by the driver
125#define ADL_ERR_NOT_SUPPORTED -8
126/// Null Pointer error
127#define ADL_ERR_NULL_POINTER -9
128/// Call can't be made due to disabled adapter
129#define ADL_ERR_DISABLED_ADAPTER -10
130/// Invalid Callback
131#define ADL_ERR_INVALID_CALLBACK -11
132/// Display Resource conflict
133#define ADL_ERR_RESOURCE_CONFLICT -12
134//Failed to update some of the values. Can be returned by set request that include multiple values if not all values were successfully committed.
135#define ADL_ERR_SET_INCOMPLETE -20
136/// There's no Linux XDisplay in Linux Console environment
137#define ADL_ERR_NO_XDISPLAY -21
138/// escape call failed becuse of incompatiable driver found in driver store
139#define ADL_ERR_CALL_TO_INCOMPATIABLE_DRIVER -22
140/// not running as administrator
141#define ADL_ERR_NO_ADMINISTRATOR_PRIVILEGES -23
142/// Feature Sync Start api is not called yet
143#define ADL_ERR_FEATURESYNC_NOT_STARTED -24
144/// Adapter is in an invalid power state
145#define ADL_ERR_INVALID_POWER_STATE -25
146/// The RPC server is in busy state
147#define ADL_ERR_SERVER_BUSY -26
148/// The GPU is occupied by application which cannot be powered off
149#define ADL_ERR_GPU_IN_USE -27
150/// The general RPC connection error
151#define ADL_ERR_RPC -28
152
153/// @}
154/// </A>
155
156/// \defgroup define_display_type Display Type
157/// Define Monitor/CRT display type
158/// @{
159/// Define Monitor display type
160#define ADL_DT_MONITOR 0
161/// Define TV display type
162#define ADL_DT_TELEVISION 1
163/// Define LCD display type
164#define ADL_DT_LCD_PANEL 2
165/// Define DFP display type
166#define ADL_DT_DIGITAL_FLAT_PANEL 3
167/// Define Componment Video display type
168#define ADL_DT_COMPONENT_VIDEO 4
169/// Define Projector display type
170#define ADL_DT_PROJECTOR 5
171/// @}
172
173/// \defgroup define_display_connection_type Display Connection Type
174/// @{
175/// Define unknown display output type
176#define ADL_DOT_UNKNOWN 0
177/// Define composite display output type
178#define ADL_DOT_COMPOSITE 1
179/// Define SVideo display output type
180#define ADL_DOT_SVIDEO 2
181/// Define analog display output type
182#define ADL_DOT_ANALOG 3
183/// Define digital display output type
184#define ADL_DOT_DIGITAL 4
185/// @}
186
187/// \defgroup define_color_type Display Color Type and Source
188/// Define Display Color Type and Source
189/// @{
190#define ADL_DISPLAY_COLOR_BRIGHTNESS (1 << 0)
191#define ADL_DISPLAY_COLOR_CONTRAST (1 << 1)
192#define ADL_DISPLAY_COLOR_SATURATION (1 << 2)
193#define ADL_DISPLAY_COLOR_HUE (1 << 3)
194#define ADL_DISPLAY_COLOR_TEMPERATURE (1 << 4)
195
196/// Color Temperature Source is EDID
197#define ADL_DISPLAY_COLOR_TEMPERATURE_SOURCE_EDID (1 << 5)
198/// Color Temperature Source is User
199#define ADL_DISPLAY_COLOR_TEMPERATURE_SOURCE_USER (1 << 6)
200/// @}
201
202/// \defgroup define_adjustment_capabilities Display Adjustment Capabilities
203/// Display adjustment capabilities values. Returned by ADL_Display_AdjustCaps_Get
204/// @{
205#define ADL_DISPLAY_ADJUST_OVERSCAN (1 << 0)
206#define ADL_DISPLAY_ADJUST_VERT_POS (1 << 1)
207#define ADL_DISPLAY_ADJUST_HOR_POS (1 << 2)
208#define ADL_DISPLAY_ADJUST_VERT_SIZE (1 << 3)
209#define ADL_DISPLAY_ADJUST_HOR_SIZE (1 << 4)
210#define ADL_DISPLAY_ADJUST_SIZEPOS (ADL_DISPLAY_ADJUST_VERT_POS | ADL_DISPLAY_ADJUST_HOR_POS | ADL_DISPLAY_ADJUST_VERT_SIZE | ADL_DISPLAY_ADJUST_HOR_SIZE)
211#define ADL_DISPLAY_CUSTOMMODES (1<<5)
212#define ADL_DISPLAY_ADJUST_UNDERSCAN (1<<6)
213/// @}
214
215///Down-scale support
216#define ADL_DISPLAY_CAPS_DOWNSCALE (1 << 0)
217
218/// Sharpness support
219#define ADL_DISPLAY_CAPS_SHARPNESS (1 << 0)
220
221/// \defgroup define_desktop_config Desktop Configuration Flags
222/// These flags are used by ADL_DesktopConfig_xxx
223/// \deprecated This API has been deprecated because it was only used for RandR 1.1 (Red Hat 5.x) distributions which is now not supported.
224/// @{
225#define ADL_DESKTOPCONFIG_UNKNOWN 0 /* UNKNOWN desktop config */
226#define ADL_DESKTOPCONFIG_SINGLE (1 << 0) /* Single */
227#define ADL_DESKTOPCONFIG_CLONE (1 << 2) /* Clone */
228#define ADL_DESKTOPCONFIG_BIGDESK_H (1 << 4) /* Big Desktop Horizontal */
229#define ADL_DESKTOPCONFIG_BIGDESK_V (1 << 5) /* Big Desktop Vertical */
230#define ADL_DESKTOPCONFIG_BIGDESK_HR (1 << 6) /* Big Desktop Reverse Horz */
231#define ADL_DESKTOPCONFIG_BIGDESK_VR (1 << 7) /* Big Desktop Reverse Vert */
232#define ADL_DESKTOPCONFIG_RANDR12 (1 << 8) /* RandR 1.2 Multi-display */
233/// @}
234
235/// needed for ADLDDCInfo structure
236#define ADL_MAX_DISPLAY_NAME 256
237
238/// \defgroup define_edid_flags Values for ulDDCInfoFlag
239/// defines for ulDDCInfoFlag EDID flag
240/// @{
241#define ADL_DISPLAYDDCINFOEX_FLAG_PROJECTORDEVICE (1 << 0)
242#define ADL_DISPLAYDDCINFOEX_FLAG_EDIDEXTENSION (1 << 1)
243#define ADL_DISPLAYDDCINFOEX_FLAG_DIGITALDEVICE (1 << 2)
244#define ADL_DISPLAYDDCINFOEX_FLAG_HDMIAUDIODEVICE (1 << 3)
245#define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORTS_AI (1 << 4)
246#define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC601 (1 << 5)
247#define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC709 (1 << 6)
248/// @}
249
250/// \defgroup define_displayinfo_connector Display Connector Type
251/// defines for ADLDisplayInfo.iDisplayConnector
252/// @{
253#define ADL_DISPLAY_CONTYPE_UNKNOWN 0
254#define ADL_DISPLAY_CONTYPE_VGA 1
255#define ADL_DISPLAY_CONTYPE_DVI_D 2
256#define ADL_DISPLAY_CONTYPE_DVI_I 3
257#define ADL_DISPLAY_CONTYPE_ATICVDONGLE_NTSC 4
258#define ADL_DISPLAY_CONTYPE_ATICVDONGLE_JPN 5
259#define ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C_JPN 6
260#define ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C_NTSC 7
261#define ADL_DISPLAY_CONTYPE_PROPRIETARY 8
262#define ADL_DISPLAY_CONTYPE_HDMI_TYPE_A 10
263#define ADL_DISPLAY_CONTYPE_HDMI_TYPE_B 11
264#define ADL_DISPLAY_CONTYPE_SVIDEO 12
265#define ADL_DISPLAY_CONTYPE_COMPOSITE 13
266#define ADL_DISPLAY_CONTYPE_RCA_3COMPONENT 14
267#define ADL_DISPLAY_CONTYPE_DISPLAYPORT 15
268#define ADL_DISPLAY_CONTYPE_EDP 16
269#define ADL_DISPLAY_CONTYPE_WIRELESSDISPLAY 17
270#define ADL_DISPLAY_CONTYPE_USB_TYPE_C 18
271/// @}
272
273/// TV Capabilities and Standards
274/// \defgroup define_tv_caps TV Capabilities and Standards
275/// \deprecated Dropping support for TV displays
276/// @{
277#define ADL_TV_STANDARDS (1 << 0)
278#define ADL_TV_SCART (1 << 1)
279
280/// TV Standards Definitions
281#define ADL_STANDARD_NTSC_M (1 << 0)
282#define ADL_STANDARD_NTSC_JPN (1 << 1)
283#define ADL_STANDARD_NTSC_N (1 << 2)
284#define ADL_STANDARD_PAL_B (1 << 3)
285#define ADL_STANDARD_PAL_COMB_N (1 << 4)
286#define ADL_STANDARD_PAL_D (1 << 5)
287#define ADL_STANDARD_PAL_G (1 << 6)
288#define ADL_STANDARD_PAL_H (1 << 7)
289#define ADL_STANDARD_PAL_I (1 << 8)
290#define ADL_STANDARD_PAL_K (1 << 9)
291#define ADL_STANDARD_PAL_K1 (1 << 10)
292#define ADL_STANDARD_PAL_L (1 << 11)
293#define ADL_STANDARD_PAL_M (1 << 12)
294#define ADL_STANDARD_PAL_N (1 << 13)
295#define ADL_STANDARD_PAL_SECAM_D (1 << 14)
296#define ADL_STANDARD_PAL_SECAM_K (1 << 15)
297#define ADL_STANDARD_PAL_SECAM_K1 (1 << 16)
298#define ADL_STANDARD_PAL_SECAM_L (1 << 17)
299/// @}
300
301
302/// \defgroup define_video_custom_mode Video Custom Mode flags
303/// Component Video Custom Mode flags. This is used by the iFlags parameter in ADLCustomMode
304/// @{
305#define ADL_CUSTOMIZEDMODEFLAG_MODESUPPORTED (1 << 0)
306#define ADL_CUSTOMIZEDMODEFLAG_NOTDELETETABLE (1 << 1)
307#define ADL_CUSTOMIZEDMODEFLAG_INSERTBYDRIVER (1 << 2)
308#define ADL_CUSTOMIZEDMODEFLAG_INTERLACED (1 << 3)
309#define ADL_CUSTOMIZEDMODEFLAG_BASEMODE (1 << 4)
310/// @}
311
312/// \defgroup define_ddcinfoflag Values used for DDCInfoFlag
313/// ulDDCInfoFlag field values used by the ADLDDCInfo structure
314/// @{
315#define ADL_DISPLAYDDCINFOEX_FLAG_PROJECTORDEVICE (1 << 0)
316#define ADL_DISPLAYDDCINFOEX_FLAG_EDIDEXTENSION (1 << 1)
317#define ADL_DISPLAYDDCINFOEX_FLAG_DIGITALDEVICE (1 << 2)
318#define ADL_DISPLAYDDCINFOEX_FLAG_HDMIAUDIODEVICE (1 << 3)
319#define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORTS_AI (1 << 4)
320#define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC601 (1 << 5)
321#define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC709 (1 << 6)
322/// @}
323
324/// \defgroup define_cv_dongle Values used by ADL_CV_DongleSettings_xxx
325/// The following is applicable to ADL_DISPLAY_CONTYPE_ATICVDONGLE_JP and ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C_D only
326/// \deprecated Dropping support for Component Video displays
327/// @{
328#define ADL_DISPLAY_CV_DONGLE_D1 (1 << 0)
329#define ADL_DISPLAY_CV_DONGLE_D2 (1 << 1)
330#define ADL_DISPLAY_CV_DONGLE_D3 (1 << 2)
331#define ADL_DISPLAY_CV_DONGLE_D4 (1 << 3)
332#define ADL_DISPLAY_CV_DONGLE_D5 (1 << 4)
333
334/// The following is applicable to ADL_DISPLAY_CONTYPE_ATICVDONGLE_NA and ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C only
335
336#define ADL_DISPLAY_CV_DONGLE_480I (1 << 0)
337#define ADL_DISPLAY_CV_DONGLE_480P (1 << 1)
338#define ADL_DISPLAY_CV_DONGLE_540P (1 << 2)
339#define ADL_DISPLAY_CV_DONGLE_720P (1 << 3)
340#define ADL_DISPLAY_CV_DONGLE_1080I (1 << 4)
341#define ADL_DISPLAY_CV_DONGLE_1080P (1 << 5)
342#define ADL_DISPLAY_CV_DONGLE_16_9 (1 << 6)
343#define ADL_DISPLAY_CV_DONGLE_720P50 (1 << 7)
344#define ADL_DISPLAY_CV_DONGLE_1080I25 (1 << 8)
345#define ADL_DISPLAY_CV_DONGLE_576I25 (1 << 9)
346#define ADL_DISPLAY_CV_DONGLE_576P50 (1 << 10)
347#define ADL_DISPLAY_CV_DONGLE_1080P24 (1 << 11)
348#define ADL_DISPLAY_CV_DONGLE_1080P25 (1 << 12)
349#define ADL_DISPLAY_CV_DONGLE_1080P30 (1 << 13)
350#define ADL_DISPLAY_CV_DONGLE_1080P50 (1 << 14)
351/// @}
352
353/// \defgroup define_formats_ovr Formats Override Settings
354/// Display force modes flags
355/// @{
356///
357#define ADL_DISPLAY_FORMAT_FORCE_720P 0x00000001
358#define ADL_DISPLAY_FORMAT_FORCE_1080I 0x00000002
359#define ADL_DISPLAY_FORMAT_FORCE_1080P 0x00000004
360#define ADL_DISPLAY_FORMAT_FORCE_720P50 0x00000008
361#define ADL_DISPLAY_FORMAT_FORCE_1080I25 0x00000010
362#define ADL_DISPLAY_FORMAT_FORCE_576I25 0x00000020
363#define ADL_DISPLAY_FORMAT_FORCE_576P50 0x00000040
364#define ADL_DISPLAY_FORMAT_FORCE_1080P24 0x00000080
365#define ADL_DISPLAY_FORMAT_FORCE_1080P25 0x00000100
366#define ADL_DISPLAY_FORMAT_FORCE_1080P30 0x00000200
367#define ADL_DISPLAY_FORMAT_FORCE_1080P50 0x00000400
368
369///< Below are \b EXTENDED display mode flags
370
371#define ADL_DISPLAY_FORMAT_CVDONGLEOVERIDE 0x00000001
372#define ADL_DISPLAY_FORMAT_CVMODEUNDERSCAN 0x00000002
373#define ADL_DISPLAY_FORMAT_FORCECONNECT_SUPPORTED 0x00000004
374#define ADL_DISPLAY_FORMAT_RESTRICT_FORMAT_SELECTION 0x00000008
375#define ADL_DISPLAY_FORMAT_SETASPECRATIO 0x00000010
376#define ADL_DISPLAY_FORMAT_FORCEMODES 0x00000020
377#define ADL_DISPLAY_FORMAT_LCDRTCCOEFF 0x00000040
378/// @}
379
380/// Defines used by OD5
381#define ADL_PM_PARAM_DONT_CHANGE 0
382
383/// The following defines Bus types
384/// @{
385#define ADL_BUSTYPE_PCI 0 /* PCI bus */
386#define ADL_BUSTYPE_AGP 1 /* AGP bus */
387#define ADL_BUSTYPE_PCIE 2 /* PCI Express bus */
388#define ADL_BUSTYPE_PCIE_GEN2 3 /* PCI Express 2nd generation bus */
389#define ADL_BUSTYPE_PCIE_GEN3 4 /* PCI Express 3rd generation bus */
390#define ADL_BUSTYPE_PCIE_GEN4 5 /* PCI Express 4th generation bus */
391#define ADL_BUSTYPE_PCIE_GEN5 6 /* PCI Express 5th generation bus */
392/// @}
393
394/// \defgroup define_ws_caps Workstation Capabilities
395/// Workstation values
396/// @{
397
398/// This value indicates that the workstation card supports active stereo though stereo output connector
399#define ADL_STEREO_SUPPORTED (1 << 2)
400/// This value indicates that the workstation card supports active stereo via "blue-line"
401#define ADL_STEREO_BLUE_LINE (1 << 3)
402/// This value is used to turn off stereo mode.
403#define ADL_STEREO_OFF 0
404/// This value indicates that the workstation card supports active stereo. This is also used to set the stereo mode to active though the stereo output connector
405#define ADL_STEREO_ACTIVE (1 << 1)
406/// This value indicates that the workstation card supports auto-stereo monitors with horizontal interleave. This is also used to set the stereo mode to use the auto-stereo monitor with horizontal interleave
407#define ADL_STEREO_AUTO_HORIZONTAL (1 << 30)
408/// This value indicates that the workstation card supports auto-stereo monitors with vertical interleave. This is also used to set the stereo mode to use the auto-stereo monitor with vertical interleave
409#define ADL_STEREO_AUTO_VERTICAL (1 << 31)
410/// This value indicates that the workstation card supports passive stereo, ie. non stereo sync
411#define ADL_STEREO_PASSIVE (1 << 6)
412/// This value indicates that the workstation card supports auto-stereo monitors with vertical interleave. This is also used to set the stereo mode to use the auto-stereo monitor with vertical interleave
413#define ADL_STEREO_PASSIVE_HORIZ (1 << 7)
414/// This value indicates that the workstation card supports auto-stereo monitors with vertical interleave. This is also used to set the stereo mode to use the auto-stereo monitor with vertical interleave
415#define ADL_STEREO_PASSIVE_VERT (1 << 8)
416/// This value indicates that the workstation card supports auto-stereo monitors with Samsung.
417#define ADL_STEREO_AUTO_SAMSUNG (1 << 11)
418/// This value indicates that the workstation card supports auto-stereo monitors with Tridility.
419#define ADL_STEREO_AUTO_TSL (1 << 12)
420/// This value indicates that the workstation card supports DeepBitDepth (10 bpp)
421#define ADL_DEEPBITDEPTH_10BPP_SUPPORTED (1 << 5)
422
423/// This value indicates that the workstation supports 8-Bit Grayscale
424#define ADL_8BIT_GREYSCALE_SUPPORTED (1 << 9)
425/// This value indicates that the workstation supports CUSTOM TIMING
426#define ADL_CUSTOM_TIMING_SUPPORTED (1 << 10)
427
428/// Load balancing is supported.
429#define ADL_WORKSTATION_LOADBALANCING_SUPPORTED 0x00000001
430/// Load balancing is available.
431#define ADL_WORKSTATION_LOADBALANCING_AVAILABLE 0x00000002
432
433/// Load balancing is disabled.
434#define ADL_WORKSTATION_LOADBALANCING_DISABLED 0x00000000
435/// Load balancing is Enabled.
436#define ADL_WORKSTATION_LOADBALANCING_ENABLED 0x00000001
437
438
439
440/// @}
441
442/// \defgroup define_adapterspeed speed setting from the adapter
443/// @{
444#define ADL_CONTEXT_SPEED_UNFORCED 0 /* default asic running speed */
445#define ADL_CONTEXT_SPEED_FORCEHIGH 1 /* asic running speed is forced to high */
446#define ADL_CONTEXT_SPEED_FORCELOW 2 /* asic running speed is forced to low */
447
448#define ADL_ADAPTER_SPEEDCAPS_SUPPORTED (1 << 0) /* change asic running speed setting is supported */
449/// @}
450
451/// \defgroup define_glsync Genlock related values
452/// GL-Sync port types (unique values)
453/// @{
454/// Unknown port of GL-Sync module
455#define ADL_GLSYNC_PORT_UNKNOWN 0
456/// BNC port of of GL-Sync module
457#define ADL_GLSYNC_PORT_BNC 1
458/// RJ45(1) port of of GL-Sync module
459#define ADL_GLSYNC_PORT_RJ45PORT1 2
460/// RJ45(2) port of of GL-Sync module
461#define ADL_GLSYNC_PORT_RJ45PORT2 3
462
463// GL-Sync Genlock settings mask (bit-vector)
464
465/// None of the ADLGLSyncGenlockConfig members are valid
466#define ADL_GLSYNC_CONFIGMASK_NONE 0
467/// The ADLGLSyncGenlockConfig.lSignalSource member is valid
468#define ADL_GLSYNC_CONFIGMASK_SIGNALSOURCE (1 << 0)
469/// The ADLGLSyncGenlockConfig.iSyncField member is valid
470#define ADL_GLSYNC_CONFIGMASK_SYNCFIELD (1 << 1)
471/// The ADLGLSyncGenlockConfig.iSampleRate member is valid
472#define ADL_GLSYNC_CONFIGMASK_SAMPLERATE (1 << 2)
473/// The ADLGLSyncGenlockConfig.lSyncDelay member is valid
474#define ADL_GLSYNC_CONFIGMASK_SYNCDELAY (1 << 3)
475/// The ADLGLSyncGenlockConfig.iTriggerEdge member is valid
476#define ADL_GLSYNC_CONFIGMASK_TRIGGEREDGE (1 << 4)
477/// The ADLGLSyncGenlockConfig.iScanRateCoeff member is valid
478#define ADL_GLSYNC_CONFIGMASK_SCANRATECOEFF (1 << 5)
479/// The ADLGLSyncGenlockConfig.lFramelockCntlVector member is valid
480#define ADL_GLSYNC_CONFIGMASK_FRAMELOCKCNTL (1 << 6)
481
482
483// GL-Sync Framelock control mask (bit-vector)
484
485/// Framelock is disabled
486#define ADL_GLSYNC_FRAMELOCKCNTL_NONE 0
487/// Framelock is enabled
488#define ADL_GLSYNC_FRAMELOCKCNTL_ENABLE ( 1 << 0)
489
490#define ADL_GLSYNC_FRAMELOCKCNTL_DISABLE ( 1 << 1)
491#define ADL_GLSYNC_FRAMELOCKCNTL_SWAP_COUNTER_RESET ( 1 << 2)
492#define ADL_GLSYNC_FRAMELOCKCNTL_SWAP_COUNTER_ACK ( 1 << 3)
493#define ADL_GLSYNC_FRAMELOCKCNTL_VERSION_KMD (1 << 4)
494
495#define ADL_GLSYNC_FRAMELOCKCNTL_STATE_ENABLE ( 1 << 0)
496#define ADL_GLSYNC_FRAMELOCKCNTL_STATE_KMD (1 << 4)
497
498// GL-Sync Framelock counters mask (bit-vector)
499#define ADL_GLSYNC_COUNTER_SWAP ( 1 << 0 )
500
501// GL-Sync Signal Sources (unique values)
502
503/// GL-Sync signal source is undefined
504#define ADL_GLSYNC_SIGNALSOURCE_UNDEFINED 0x00000100
505/// GL-Sync signal source is Free Run
506#define ADL_GLSYNC_SIGNALSOURCE_FREERUN 0x00000101
507/// GL-Sync signal source is the BNC GL-Sync port
508#define ADL_GLSYNC_SIGNALSOURCE_BNCPORT 0x00000102
509/// GL-Sync signal source is the RJ45(1) GL-Sync port
510#define ADL_GLSYNC_SIGNALSOURCE_RJ45PORT1 0x00000103
511/// GL-Sync signal source is the RJ45(2) GL-Sync port
512#define ADL_GLSYNC_SIGNALSOURCE_RJ45PORT2 0x00000104
513
514
515// GL-Sync Signal Types (unique values)
516
517/// GL-Sync signal type is unknown
518#define ADL_GLSYNC_SIGNALTYPE_UNDEFINED 0
519/// GL-Sync signal type is 480I
520#define ADL_GLSYNC_SIGNALTYPE_480I 1
521/// GL-Sync signal type is 576I
522#define ADL_GLSYNC_SIGNALTYPE_576I 2
523/// GL-Sync signal type is 480P
524#define ADL_GLSYNC_SIGNALTYPE_480P 3
525/// GL-Sync signal type is 576P
526#define ADL_GLSYNC_SIGNALTYPE_576P 4
527/// GL-Sync signal type is 720P
528#define ADL_GLSYNC_SIGNALTYPE_720P 5
529/// GL-Sync signal type is 1080P
530#define ADL_GLSYNC_SIGNALTYPE_1080P 6
531/// GL-Sync signal type is 1080I
532#define ADL_GLSYNC_SIGNALTYPE_1080I 7
533/// GL-Sync signal type is SDI
534#define ADL_GLSYNC_SIGNALTYPE_SDI 8
535/// GL-Sync signal type is TTL
536#define ADL_GLSYNC_SIGNALTYPE_TTL 9
537/// GL_Sync signal type is Analog
538#define ADL_GLSYNC_SIGNALTYPE_ANALOG 10
539
540// GL-Sync Sync Field options (unique values)
541
542///GL-Sync sync field option is undefined
543#define ADL_GLSYNC_SYNCFIELD_UNDEFINED 0
544///GL-Sync sync field option is Sync to Field 1 (used for Interlaced signal types)
545#define ADL_GLSYNC_SYNCFIELD_BOTH 1
546///GL-Sync sync field option is Sync to Both fields (used for Interlaced signal types)
547#define ADL_GLSYNC_SYNCFIELD_1 2
548
549
550// GL-Sync trigger edge options (unique values)
551
552/// GL-Sync trigger edge is undefined
553#define ADL_GLSYNC_TRIGGEREDGE_UNDEFINED 0
554/// GL-Sync trigger edge is the rising edge
555#define ADL_GLSYNC_TRIGGEREDGE_RISING 1
556/// GL-Sync trigger edge is the falling edge
557#define ADL_GLSYNC_TRIGGEREDGE_FALLING 2
558/// GL-Sync trigger edge is both the rising and the falling edge
559#define ADL_GLSYNC_TRIGGEREDGE_BOTH 3
560
561
562// GL-Sync scan rate coefficient/multiplier options (unique values)
563
564/// GL-Sync scan rate coefficient/multiplier is undefined
565#define ADL_GLSYNC_SCANRATECOEFF_UNDEFINED 0
566/// GL-Sync scan rate coefficient/multiplier is 5
567#define ADL_GLSYNC_SCANRATECOEFF_x5 1
568/// GL-Sync scan rate coefficient/multiplier is 4
569#define ADL_GLSYNC_SCANRATECOEFF_x4 2
570/// GL-Sync scan rate coefficient/multiplier is 3
571#define ADL_GLSYNC_SCANRATECOEFF_x3 3
572/// GL-Sync scan rate coefficient/multiplier is 5:2 (SMPTE)
573#define ADL_GLSYNC_SCANRATECOEFF_x5_DIV_2 4
574/// GL-Sync scan rate coefficient/multiplier is 2
575#define ADL_GLSYNC_SCANRATECOEFF_x2 5
576/// GL-Sync scan rate coefficient/multiplier is 3 : 2
577#define ADL_GLSYNC_SCANRATECOEFF_x3_DIV_2 6
578/// GL-Sync scan rate coefficient/multiplier is 5 : 4
579#define ADL_GLSYNC_SCANRATECOEFF_x5_DIV_4 7
580/// GL-Sync scan rate coefficient/multiplier is 1 (default)
581#define ADL_GLSYNC_SCANRATECOEFF_x1 8
582/// GL-Sync scan rate coefficient/multiplier is 4 : 5
583#define ADL_GLSYNC_SCANRATECOEFF_x4_DIV_5 9
584/// GL-Sync scan rate coefficient/multiplier is 2 : 3
585#define ADL_GLSYNC_SCANRATECOEFF_x2_DIV_3 10
586/// GL-Sync scan rate coefficient/multiplier is 1 : 2
587#define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_2 11
588/// GL-Sync scan rate coefficient/multiplier is 2 : 5 (SMPTE)
589#define ADL_GLSYNC_SCANRATECOEFF_x2_DIV_5 12
590/// GL-Sync scan rate coefficient/multiplier is 1 : 3
591#define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_3 13
592/// GL-Sync scan rate coefficient/multiplier is 1 : 4
593#define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_4 14
594/// GL-Sync scan rate coefficient/multiplier is 1 : 5
595#define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_5 15
596
597
598// GL-Sync port (signal presence) states (unique values)
599
600/// GL-Sync port state is undefined
601#define ADL_GLSYNC_PORTSTATE_UNDEFINED 0
602/// GL-Sync port is not connected
603#define ADL_GLSYNC_PORTSTATE_NOCABLE 1
604/// GL-Sync port is Idle
605#define ADL_GLSYNC_PORTSTATE_IDLE 2
606/// GL-Sync port has an Input signal
607#define ADL_GLSYNC_PORTSTATE_INPUT 3
608/// GL-Sync port is Output
609#define ADL_GLSYNC_PORTSTATE_OUTPUT 4
610
611
612// GL-Sync LED types (used index within ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array) (unique values)
613
614/// Index into the ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array for the one LED of the BNC port
615#define ADL_GLSYNC_LEDTYPE_BNC 0
616/// Index into the ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array for the Left LED of the RJ45(1) or RJ45(2) port
617#define ADL_GLSYNC_LEDTYPE_RJ45_LEFT 0
618/// Index into the ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array for the Right LED of the RJ45(1) or RJ45(2) port
619#define ADL_GLSYNC_LEDTYPE_RJ45_RIGHT 1
620
621
622// GL-Sync LED colors (unique values)
623
624/// GL-Sync LED undefined color
625#define ADL_GLSYNC_LEDCOLOR_UNDEFINED 0
626/// GL-Sync LED is unlit
627#define ADL_GLSYNC_LEDCOLOR_NOLIGHT 1
628/// GL-Sync LED is yellow
629#define ADL_GLSYNC_LEDCOLOR_YELLOW 2
630/// GL-Sync LED is red
631#define ADL_GLSYNC_LEDCOLOR_RED 3
632/// GL-Sync LED is green
633#define ADL_GLSYNC_LEDCOLOR_GREEN 4
634/// GL-Sync LED is flashing green
635#define ADL_GLSYNC_LEDCOLOR_FLASH_GREEN 5
636
637
638// GL-Sync Port Control (refers one GL-Sync Port) (unique values)
639
640/// Used to configure the RJ54(1) or RJ42(2) port of GL-Sync is as Idle
641#define ADL_GLSYNC_PORTCNTL_NONE 0x00000000
642/// Used to configure the RJ54(1) or RJ42(2) port of GL-Sync is as Output
643#define ADL_GLSYNC_PORTCNTL_OUTPUT 0x00000001
644
645
646// GL-Sync Mode Control (refers one Display/Controller) (bitfields)
647
648/// Used to configure the display to use internal timing (not genlocked)
649#define ADL_GLSYNC_MODECNTL_NONE 0x00000000
650/// Bitfield used to configure the display as genlocked (either as Timing Client or as Timing Server)
651#define ADL_GLSYNC_MODECNTL_GENLOCK 0x00000001
652/// Bitfield used to configure the display as Timing Server
653#define ADL_GLSYNC_MODECNTL_TIMINGSERVER 0x00000002
654
655// GL-Sync Mode Status
656/// Display is currently not genlocked
657#define ADL_GLSYNC_MODECNTL_STATUS_NONE 0x00000000
658/// Display is currently genlocked
659#define ADL_GLSYNC_MODECNTL_STATUS_GENLOCK 0x00000001
660/// Display requires a mode switch
661#define ADL_GLSYNC_MODECNTL_STATUS_SETMODE_REQUIRED 0x00000002
662/// Display is capable of being genlocked
663#define ADL_GLSYNC_MODECNTL_STATUS_GENLOCK_ALLOWED 0x00000004
664
665#define ADL_MAX_GLSYNC_PORTS 8
666#define ADL_MAX_GLSYNC_PORT_LEDS 8
667
668/// @}
669
670/// \defgroup define_crossfirestate CrossfireX state of a particular adapter CrossfireX combination
671/// @{
672#define ADL_XFIREX_STATE_NOINTERCONNECT ( 1 << 0 ) /* Dongle / cable is missing */
673#define ADL_XFIREX_STATE_DOWNGRADEPIPES ( 1 << 1 ) /* CrossfireX can be enabled if pipes are downgraded */
674#define ADL_XFIREX_STATE_DOWNGRADEMEM ( 1 << 2 ) /* CrossfireX cannot be enabled unless mem downgraded */
675#define ADL_XFIREX_STATE_REVERSERECOMMENDED ( 1 << 3 ) /* Card reversal recommended, CrossfireX cannot be enabled. */
676#define ADL_XFIREX_STATE_3DACTIVE ( 1 << 4 ) /* 3D client is active - CrossfireX cannot be safely enabled */
677#define ADL_XFIREX_STATE_MASTERONSLAVE ( 1 << 5 ) /* Dongle is OK but master is on slave */
678#define ADL_XFIREX_STATE_NODISPLAYCONNECT ( 1 << 6 ) /* No (valid) display connected to master card. */
679#define ADL_XFIREX_STATE_NOPRIMARYVIEW ( 1 << 7 ) /* CrossfireX is enabled but master is not current primary device */
680#define ADL_XFIREX_STATE_DOWNGRADEVISMEM ( 1 << 8 ) /* CrossfireX cannot be enabled unless visible mem downgraded */
681#define ADL_XFIREX_STATE_LESSTHAN8LANE_MASTER ( 1 << 9 ) /* CrossfireX can be enabled however performance not optimal due to <8 lanes */
682#define ADL_XFIREX_STATE_LESSTHAN8LANE_SLAVE ( 1 << 10 ) /* CrossfireX can be enabled however performance not optimal due to <8 lanes */
683#define ADL_XFIREX_STATE_PEERTOPEERFAILED ( 1 << 11 ) /* CrossfireX cannot be enabled due to failed peer to peer test */
684#define ADL_XFIREX_STATE_MEMISDOWNGRADED ( 1 << 16 ) /* Notification that memory is currently downgraded */
685#define ADL_XFIREX_STATE_PIPESDOWNGRADED ( 1 << 17 ) /* Notification that pipes are currently downgraded */
686#define ADL_XFIREX_STATE_XFIREXACTIVE ( 1 << 18 ) /* CrossfireX is enabled on current device */
687#define ADL_XFIREX_STATE_VISMEMISDOWNGRADED ( 1 << 19 ) /* Notification that visible FB memory is currently downgraded */
688#define ADL_XFIREX_STATE_INVALIDINTERCONNECTION ( 1 << 20 ) /* Cannot support current inter-connection configuration */
689#define ADL_XFIREX_STATE_NONP2PMODE ( 1 << 21 ) /* CrossfireX will only work with clients supporting non P2P mode */
690#define ADL_XFIREX_STATE_DOWNGRADEMEMBANKS ( 1 << 22 ) /* CrossfireX cannot be enabled unless memory banks downgraded */
691#define ADL_XFIREX_STATE_MEMBANKSDOWNGRADED ( 1 << 23 ) /* Notification that memory banks are currently downgraded */
692#define ADL_XFIREX_STATE_DUALDISPLAYSALLOWED ( 1 << 24 ) /* Extended desktop or clone mode is allowed. */
693#define ADL_XFIREX_STATE_P2P_APERTURE_MAPPING ( 1 << 25 ) /* P2P mapping was through peer aperture */
694#define ADL_XFIREX_STATE_P2PFLUSH_REQUIRED ADL_XFIREX_STATE_P2P_APERTURE_MAPPING /* For back compatible */
695#define ADL_XFIREX_STATE_XSP_CONNECTED ( 1 << 26 ) /* There is CrossfireX side port connection between GPUs */
696#define ADL_XFIREX_STATE_ENABLE_CF_REBOOT_REQUIRED ( 1 << 27 ) /* System needs a reboot bofore enable CrossfireX */
697#define ADL_XFIREX_STATE_DISABLE_CF_REBOOT_REQUIRED ( 1 << 28 ) /* System needs a reboot after disable CrossfireX */
698#define ADL_XFIREX_STATE_DRV_HANDLE_DOWNGRADE_KEY ( 1 << 29 ) /* Indicate base driver handles the downgrade key updating */
699#define ADL_XFIREX_STATE_CF_RECONFIG_REQUIRED ( 1 << 30 ) /* CrossfireX need to be reconfigured by CCC because of a LDA chain broken */
700#define ADL_XFIREX_STATE_ERRORGETTINGSTATUS ( 1 << 31 ) /* Could not obtain current status */
701/// @}
702
703///////////////////////////////////////////////////////////////////////////
704// ADL_DISPLAY_ADJUSTMENT_PIXELFORMAT adjustment values
705// (bit-vector)
706///////////////////////////////////////////////////////////////////////////
707/// \defgroup define_pixel_formats Pixel Formats values
708/// This group defines the various Pixel Formats that a particular digital display can support. \n
709/// Since a display can support multiple formats, these values can be bit-or'ed to indicate the various formats \n
710/// @{
711#define ADL_DISPLAY_PIXELFORMAT_UNKNOWN 0
712#define ADL_DISPLAY_PIXELFORMAT_RGB (1 << 0)
713#define ADL_DISPLAY_PIXELFORMAT_YCRCB444 (1 << 1) //Limited range
714#define ADL_DISPLAY_PIXELFORMAT_YCRCB422 (1 << 2) //Limited range
715#define ADL_DISPLAY_PIXELFORMAT_RGB_LIMITED_RANGE (1 << 3)
716#define ADL_DISPLAY_PIXELFORMAT_RGB_FULL_RANGE ADL_DISPLAY_PIXELFORMAT_RGB //Full range
717#define ADL_DISPLAY_PIXELFORMAT_YCRCB420 (1 << 4)
718/// @}
719
720/// \defgroup define_contype Connector Type Values
721/// ADLDisplayConfig.ulConnectorType defines
722/// @{
723#define ADL_DL_DISPLAYCONFIG_CONTYPE_UNKNOWN 0
724#define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_NONI2C_JP 1
725#define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_JPN 2
726#define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_NA 3
727#define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_NONI2C_NA 4
728#define ADL_DL_DISPLAYCONFIG_CONTYPE_VGA 5
729#define ADL_DL_DISPLAYCONFIG_CONTYPE_DVI_D 6
730#define ADL_DL_DISPLAYCONFIG_CONTYPE_DVI_I 7
731#define ADL_DL_DISPLAYCONFIG_CONTYPE_HDMI_TYPE_A 8
732#define ADL_DL_DISPLAYCONFIG_CONTYPE_HDMI_TYPE_B 9
733#define ADL_DL_DISPLAYCONFIG_CONTYPE_DISPLAYPORT 10
734/// @}
735
736///////////////////////////////////////////////////////////////////////////
737// ADL_DISPLAY_DISPLAYINFO_ Definitions
738// for ADLDisplayInfo.iDisplayInfoMask and ADLDisplayInfo.iDisplayInfoValue
739// (bit-vector)
740///////////////////////////////////////////////////////////////////////////
741/// \defgroup define_displayinfomask Display Info Mask Values
742/// @{
743#define ADL_DISPLAY_DISPLAYINFO_DISPLAYCONNECTED 0x00000001
744#define ADL_DISPLAY_DISPLAYINFO_DISPLAYMAPPED 0x00000002
745#define ADL_DISPLAY_DISPLAYINFO_NONLOCAL 0x00000004
746#define ADL_DISPLAY_DISPLAYINFO_FORCIBLESUPPORTED 0x00000008
747#define ADL_DISPLAY_DISPLAYINFO_GENLOCKSUPPORTED 0x00000010
748#define ADL_DISPLAY_DISPLAYINFO_MULTIVPU_SUPPORTED 0x00000020
749#define ADL_DISPLAY_DISPLAYINFO_LDA_DISPLAY 0x00000040
750#define ADL_DISPLAY_DISPLAYINFO_MODETIMING_OVERRIDESSUPPORTED 0x00000080
751
752#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_SINGLE 0x00000100
753#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_CLONE 0x00000200
754
755/// Legacy support for XP
756#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_2VSTRETCH 0x00000400
757#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_2HSTRETCH 0x00000800
758#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_EXTENDED 0x00001000
759
760/// More support manners
761#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_NSTRETCH1GPU 0x00010000
762#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_NSTRETCHNGPU 0x00020000
763#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_RESERVED2 0x00040000
764#define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_RESERVED3 0x00080000
765
766/// Projector display type
767#define ADL_DISPLAY_DISPLAYINFO_SHOWTYPE_PROJECTOR 0x00100000
768
769/// @}
770
771
772///////////////////////////////////////////////////////////////////////////
773// ADL_ADAPTER_DISPLAY_MANNER_SUPPORTED_ Definitions
774// for ADLAdapterDisplayCap of ADL_Adapter_Display_Cap()
775// (bit-vector)
776///////////////////////////////////////////////////////////////////////////
777/// \defgroup define_adaptermanner Adapter Manner Support Values
778/// @{
779#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_NOTACTIVE 0x00000001
780#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_SINGLE 0x00000002
781#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_CLONE 0x00000004
782#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_NSTRETCH1GPU 0x00000008
783#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_NSTRETCHNGPU 0x00000010
784
785/// Legacy support for XP
786#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_2VSTRETCH 0x00000020
787#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_2HSTRETCH 0x00000040
788#define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_EXTENDED 0x00000080
789
790#define ADL_ADAPTER_DISPLAYCAP_PREFERDISPLAY_SUPPORTED 0x00000100
791#define ADL_ADAPTER_DISPLAYCAP_BEZEL_SUPPORTED 0x00000200
792
793
794///////////////////////////////////////////////////////////////////////////
795// ADL_DISPLAY_DISPLAYMAP_MANNER_ Definitions
796// for ADLDisplayMap.iDisplayMapMask and ADLDisplayMap.iDisplayMapValue
797// (bit-vector)
798///////////////////////////////////////////////////////////////////////////
799#define ADL_DISPLAY_DISPLAYMAP_MANNER_RESERVED 0x00000001
800#define ADL_DISPLAY_DISPLAYMAP_MANNER_NOTACTIVE 0x00000002
801#define ADL_DISPLAY_DISPLAYMAP_MANNER_SINGLE 0x00000004
802#define ADL_DISPLAY_DISPLAYMAP_MANNER_CLONE 0x00000008
803#define ADL_DISPLAY_DISPLAYMAP_MANNER_RESERVED1 0x00000010 // Removed NSTRETCH
804#define ADL_DISPLAY_DISPLAYMAP_MANNER_HSTRETCH 0x00000020
805#define ADL_DISPLAY_DISPLAYMAP_MANNER_VSTRETCH 0x00000040
806#define ADL_DISPLAY_DISPLAYMAP_MANNER_VLD 0x00000080
807
808/// @}
809
810///////////////////////////////////////////////////////////////////////////
811// ADL_DISPLAY_DISPLAYMAP_OPTION_ Definitions
812// for iOption in function ADL_Display_DisplayMapConfig_Get
813// (bit-vector)
814///////////////////////////////////////////////////////////////////////////
815#define ADL_DISPLAY_DISPLAYMAP_OPTION_GPUINFO 0x00000001
816
817///////////////////////////////////////////////////////////////////////////
818// ADL_DISPLAY_DISPLAYTARGET_ Definitions
819// for ADLDisplayTarget.iDisplayTargetMask and ADLDisplayTarget.iDisplayTargetValue
820// (bit-vector)
821///////////////////////////////////////////////////////////////////////////
822#define ADL_DISPLAY_DISPLAYTARGET_PREFERRED 0x00000001
823
824///////////////////////////////////////////////////////////////////////////
825// ADL_DISPLAY_POSSIBLEMAPRESULT_VALID Definitions
826// for ADLPossibleMapResult.iPossibleMapResultMask and ADLPossibleMapResult.iPossibleMapResultValue
827// (bit-vector)
828///////////////////////////////////////////////////////////////////////////
829#define ADL_DISPLAY_POSSIBLEMAPRESULT_VALID 0x00000001
830#define ADL_DISPLAY_POSSIBLEMAPRESULT_BEZELSUPPORTED 0x00000002
831#define ADL_DISPLAY_POSSIBLEMAPRESULT_OVERLAPSUPPORTED 0x00000004
832
833///////////////////////////////////////////////////////////////////////////
834// ADL_DISPLAY_MODE_ Definitions
835// for ADLMode.iModeMask, ADLMode.iModeValue, and ADLMode.iModeFlag
836// (bit-vector)
837///////////////////////////////////////////////////////////////////////////
838/// \defgroup define_displaymode Display Mode Values
839/// @{
840#define ADL_DISPLAY_MODE_COLOURFORMAT_565 0x00000001
841#define ADL_DISPLAY_MODE_COLOURFORMAT_8888 0x00000002
842#define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_000 0x00000004
843#define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_090 0x00000008
844#define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_180 0x00000010
845#define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_270 0x00000020
846#define ADL_DISPLAY_MODE_REFRESHRATE_ROUNDED 0x00000040
847#define ADL_DISPLAY_MODE_REFRESHRATE_ONLY 0x00000080
848
849#define ADL_DISPLAY_MODE_PROGRESSIVE_FLAG 0
850#define ADL_DISPLAY_MODE_INTERLACED_FLAG 2
851/// @}
852
853///////////////////////////////////////////////////////////////////////////
854// ADL_OSMODEINFO Definitions
855///////////////////////////////////////////////////////////////////////////
856/// \defgroup define_osmode OS Mode Values
857/// @{
858#define ADL_OSMODEINFOXPOS_DEFAULT -640
859#define ADL_OSMODEINFOYPOS_DEFAULT 0
860#define ADL_OSMODEINFOXRES_DEFAULT 640
861#define ADL_OSMODEINFOYRES_DEFAULT 480
862#define ADL_OSMODEINFOXRES_DEFAULT800 800
863#define ADL_OSMODEINFOYRES_DEFAULT600 600
864#define ADL_OSMODEINFOREFRESHRATE_DEFAULT 60
865#define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT 8
866#define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT16 16
867#define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT24 24
868#define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT32 32
869#define ADL_OSMODEINFOORIENTATION_DEFAULT 0
870#define ADL_OSMODEINFOORIENTATION_DEFAULT_WIN7 DISPLAYCONFIG_ROTATION_FORCE_UINT32
871#define ADL_OSMODEFLAG_DEFAULT 0
872/// @}
873
874///////////////////////////////////////////////////////////////////////////
875// ADLThreadingModel Enumeration
876///////////////////////////////////////////////////////////////////////////
877/// \defgroup thread_model
878/// Used with \ref ADL_Main_ControlX2_Create and \ref ADL2_Main_ControlX2_Create to specify how ADL handles API calls when executed by multiple threads concurrently.
879/// \brief Declares ADL threading behavior.
880/// @{
881typedef enum ADLThreadingModel
882{
883 ADL_THREADING_UNLOCKED = 0, /*!< Default behavior. ADL will not enforce serialization of ADL API executions by multiple threads. Multiple threads will be allowed to enter to ADL at the same time. Note that ADL library is not guaranteed to be thread-safe. Client that calls ADL_Main_Control_Create have to provide its own mechanism for ADL calls serialization. */
884 ADL_THREADING_LOCKED /*!< ADL will enforce serialization of ADL API when called by multiple threads. Only single thread will be allowed to enter ADL API at the time. This option makes ADL calls thread-safe. */
885}ADLThreadingModel;
886
887/// @}
888///////////////////////////////////////////////////////////////////////////
889// ADLPurposeCode Enumeration
890///////////////////////////////////////////////////////////////////////////
891enum ADLPurposeCode
892{
893 ADL_PURPOSECODE_NORMAL = 0,
894 ADL_PURPOSECODE_HIDE_MODE_SWITCH,
895 ADL_PURPOSECODE_MODE_SWITCH,
896 ADL_PURPOSECODE_ATTATCH_DEVICE,
897 ADL_PURPOSECODE_DETACH_DEVICE,
898 ADL_PURPOSECODE_SETPRIMARY_DEVICE,
899 ADL_PURPOSECODE_GDI_ROTATION,
900 ADL_PURPOSECODE_ATI_ROTATION
901};
902///////////////////////////////////////////////////////////////////////////
903// ADLAngle Enumeration
904///////////////////////////////////////////////////////////////////////////
905enum ADLAngle
906{
907 ADL_ANGLE_LANDSCAPE = 0,
908 ADL_ANGLE_ROTATERIGHT = 90,
909 ADL_ANGLE_ROTATE180 = 180,
910 ADL_ANGLE_ROTATELEFT = 270,
911};
912
913///////////////////////////////////////////////////////////////////////////
914// ADLOrientationDataType Enumeration
915///////////////////////////////////////////////////////////////////////////
916enum ADLOrientationDataType
917{
918 ADL_ORIENTATIONTYPE_OSDATATYPE,
919 ADL_ORIENTATIONTYPE_NONOSDATATYPE
920};
921
922///////////////////////////////////////////////////////////////////////////
923// ADLPanningMode Enumeration
924///////////////////////////////////////////////////////////////////////////
925enum ADLPanningMode
926{
927 ADL_PANNINGMODE_NO_PANNING = 0,
928 ADL_PANNINGMODE_AT_LEAST_ONE_NO_PANNING = 1,
929 ADL_PANNINGMODE_ALLOW_PANNING = 2,
930};
931
932///////////////////////////////////////////////////////////////////////////
933// ADLLARGEDESKTOPTYPE Enumeration
934///////////////////////////////////////////////////////////////////////////
935enum ADLLARGEDESKTOPTYPE
936{
937 ADL_LARGEDESKTOPTYPE_NORMALDESKTOP = 0,
938 ADL_LARGEDESKTOPTYPE_PSEUDOLARGEDESKTOP = 1,
939 ADL_LARGEDESKTOPTYPE_VERYLARGEDESKTOP = 2
940};
941
942///////////////////////////////////////////////////////////////////////////
943// ADLPlatform Enumeration
944///////////////////////////////////////////////////////////////////////////
945enum ADLPlatForm
946{
947 GRAPHICS_PLATFORM_DESKTOP = 0,
948 GRAPHICS_PLATFORM_MOBILE = 1
949};
950
951///////////////////////////////////////////////////////////////////////////
952// ADLGraphicCoreGeneration Enumeration
953///////////////////////////////////////////////////////////////////////////
954enum ADLGraphicCoreGeneration
955{
956 ADL_GRAPHIC_CORE_GENERATION_UNDEFINED = 0,
957 ADL_GRAPHIC_CORE_GENERATION_PRE_GCN = 1,
958 ADL_GRAPHIC_CORE_GENERATION_GCN = 2,
959 ADL_GRAPHIC_CORE_GENERATION_RDNA = 3
960};
961
962// Other Definitions for internal use
963
964// Values for ADL_Display_WriteAndReadI2CRev_Get()
965
966#define ADL_I2C_MAJOR_API_REV 0x00000001
967#define ADL_I2C_MINOR_DEFAULT_API_REV 0x00000000
968#define ADL_I2C_MINOR_OEM_API_REV 0x00000001
969
970// Values for ADL_Display_WriteAndReadI2C()
971#define ADL_DL_I2C_LINE_OEM 0x00000001
972#define ADL_DL_I2C_LINE_OD_CONTROL 0x00000002
973#define ADL_DL_I2C_LINE_OEM2 0x00000003
974#define ADL_DL_I2C_LINE_OEM3 0x00000004
975#define ADL_DL_I2C_LINE_OEM4 0x00000005
976#define ADL_DL_I2C_LINE_OEM5 0x00000006
977#define ADL_DL_I2C_LINE_OEM6 0x00000007
978#define ADL_DL_I2C_LINE_GPIO 0x00000008
979
980// Max size of I2C data buffer
981#define ADL_DL_I2C_MAXDATASIZE 0x00000018
982#define ADL_DL_I2C_MAXWRITEDATASIZE 0x0000000C
983#define ADL_DL_I2C_MAXADDRESSLENGTH 0x00000006
984#define ADL_DL_I2C_MAXOFFSETLENGTH 0x00000004
985
986// I2C clock speed in KHz
987#define ADL_DL_I2C_SPEED_50K 50
988#define ADL_DL_I2C_SPEED_100K 100
989#define ALD_DL_I2C_SPEED_400K 400
990#define ADL_DL_I2C_SPEED_1M 1000
991#define ADL_DL_I2C_SPEED_2M 2300
992
993/// Values for ADLDisplayProperty.iPropertyType
994#define ADL_DL_DISPLAYPROPERTY_TYPE_UNKNOWN 0
995#define ADL_DL_DISPLAYPROPERTY_TYPE_EXPANSIONMODE 1
996#define ADL_DL_DISPLAYPROPERTY_TYPE_USEUNDERSCANSCALING 2
997/// Enables ITC processing for HDMI panels that are capable of the feature
998#define ADL_DL_DISPLAYPROPERTY_TYPE_ITCFLAGENABLE 9
999#define ADL_DL_DISPLAYPROPERTY_TYPE_DOWNSCALE 11
1000#define ADL_DL_DISPLAYPROPERTY_TYPE_INTEGER_SCALING 12
1001
1002
1003/// Values for ADLDisplayContent.iContentType
1004/// Certain HDMI panels that support ITC have support for a feature such that, the display on the panel
1005/// can be adjusted to optimize the view of the content being displayed, depending on the type of content.
1006#define ADL_DL_DISPLAYCONTENT_TYPE_GRAPHICS 1
1007#define ADL_DL_DISPLAYCONTENT_TYPE_PHOTO 2
1008#define ADL_DL_DISPLAYCONTENT_TYPE_CINEMA 4
1009#define ADL_DL_DISPLAYCONTENT_TYPE_GAME 8
1010
1011
1012
1013//values for ADLDisplayProperty.iExpansionMode
1014#define ADL_DL_DISPLAYPROPERTY_EXPANSIONMODE_CENTER 0
1015#define ADL_DL_DISPLAYPROPERTY_EXPANSIONMODE_FULLSCREEN 1
1016#define ADL_DL_DISPLAYPROPERTY_EXPANSIONMODE_ASPECTRATIO 2
1017
1018
1019///\defgroup define_dither_states Dithering options
1020/// @{
1021/// Dithering disabled.
1022#define ADL_DL_DISPLAY_DITHER_DISABLED 0
1023/// Use default driver settings for dithering. Note that the default setting could be dithering disabled.
1024#define ADL_DL_DISPLAY_DITHER_DRIVER_DEFAULT 1
1025/// Temporal dithering to 6 bpc. Note that if the input is 12 bits, the two least significant bits will be truncated.
1026#define ADL_DL_DISPLAY_DITHER_FM6 2
1027/// Temporal dithering to 8 bpc.
1028#define ADL_DL_DISPLAY_DITHER_FM8 3
1029/// Temporal dithering to 10 bpc.
1030#define ADL_DL_DISPLAY_DITHER_FM10 4
1031/// Spatial dithering to 6 bpc. Note that if the input is 12 bits, the two least significant bits will be truncated.
1032#define ADL_DL_DISPLAY_DITHER_DITH6 5
1033/// Spatial dithering to 8 bpc.
1034#define ADL_DL_DISPLAY_DITHER_DITH8 6
1035/// Spatial dithering to 10 bpc.
1036#define ADL_DL_DISPLAY_DITHER_DITH10 7
1037/// Spatial dithering to 6 bpc. Random number generators are reset every frame, so the same input value of a certain pixel will always be dithered to the same output value. Note that if the input is 12 bits, the two least significant bits will be truncated.
1038#define ADL_DL_DISPLAY_DITHER_DITH6_NO_FRAME_RAND 8
1039/// Spatial dithering to 8 bpc. Random number generators are reset every frame, so the same input value of a certain pixel will always be dithered to the same output value.
1040#define ADL_DL_DISPLAY_DITHER_DITH8_NO_FRAME_RAND 9
1041/// Spatial dithering to 10 bpc. Random number generators are reset every frame, so the same input value of a certain pixel will always be dithered to the same output value.
1042#define ADL_DL_DISPLAY_DITHER_DITH10_NO_FRAME_RAND 10
1043/// Truncation to 6 bpc.
1044#define ADL_DL_DISPLAY_DITHER_TRUN6 11
1045/// Truncation to 8 bpc.
1046#define ADL_DL_DISPLAY_DITHER_TRUN8 12
1047/// Truncation to 10 bpc.
1048#define ADL_DL_DISPLAY_DITHER_TRUN10 13
1049/// Truncation to 10 bpc followed by spatial dithering to 8 bpc.
1050#define ADL_DL_DISPLAY_DITHER_TRUN10_DITH8 14
1051/// Truncation to 10 bpc followed by spatial dithering to 6 bpc.
1052#define ADL_DL_DISPLAY_DITHER_TRUN10_DITH6 15
1053/// Truncation to 10 bpc followed by temporal dithering to 8 bpc.
1054#define ADL_DL_DISPLAY_DITHER_TRUN10_FM8 16
1055/// Truncation to 10 bpc followed by temporal dithering to 6 bpc.
1056#define ADL_DL_DISPLAY_DITHER_TRUN10_FM6 17
1057/// Truncation to 10 bpc followed by spatial dithering to 8 bpc and temporal dithering to 6 bpc.
1058#define ADL_DL_DISPLAY_DITHER_TRUN10_DITH8_FM6 18
1059/// Spatial dithering to 10 bpc followed by temporal dithering to 8 bpc.
1060#define ADL_DL_DISPLAY_DITHER_DITH10_FM8 19
1061/// Spatial dithering to 10 bpc followed by temporal dithering to 6 bpc.
1062#define ADL_DL_DISPLAY_DITHER_DITH10_FM6 20
1063/// Truncation to 8 bpc followed by spatial dithering to 6 bpc.
1064#define ADL_DL_DISPLAY_DITHER_TRUN8_DITH6 21
1065/// Truncation to 8 bpc followed by temporal dithering to 6 bpc.
1066#define ADL_DL_DISPLAY_DITHER_TRUN8_FM6 22
1067/// Spatial dithering to 8 bpc followed by temporal dithering to 6 bpc.
1068#define ADL_DL_DISPLAY_DITHER_DITH8_FM6 23
1069#define ADL_DL_DISPLAY_DITHER_LAST ADL_DL_DISPLAY_DITHER_DITH8_FM6
1070/// @}
1071
1072
1073/// Display Get Cached EDID flag
1074#define ADL_MAX_EDIDDATA_SIZE 256 // number of UCHAR
1075#define ADL_MAX_OVERRIDEEDID_SIZE 512 // number of UCHAR
1076#define ADL_MAX_EDID_EXTENSION_BLOCKS 3
1077
1078#define ADL_DL_CONTROLLER_OVERLAY_ALPHA 0
1079#define ADL_DL_CONTROLLER_OVERLAY_ALPHAPERPIX 1
1080
1081#define ADL_DL_DISPLAY_DATA_PACKET__INFO_PACKET_RESET 0x00000000
1082#define ADL_DL_DISPLAY_DATA_PACKET__INFO_PACKET_SET 0x00000001
1083#define ADL_DL_DISPLAY_DATA_PACKET__INFO_PACKET_SCAN 0x00000002
1084
1085///\defgroup define_display_packet Display Data Packet Types
1086/// @{
1087#define ADL_DL_DISPLAY_DATA_PACKET__TYPE__AVI 0x00000001
1088#define ADL_DL_DISPLAY_DATA_PACKET__TYPE__GAMMUT 0x00000002
1089#define ADL_DL_DISPLAY_DATA_PACKET__TYPE__VENDORINFO 0x00000004
1090#define ADL_DL_DISPLAY_DATA_PACKET__TYPE__HDR 0x00000008
1091#define ADL_DL_DISPLAY_DATA_PACKET__TYPE__SPD 0x00000010
1092/// @}
1093
1094// matrix types
1095#define ADL_GAMUT_MATRIX_SD 1 // SD matrix i.e. BT601
1096#define ADL_GAMUT_MATRIX_HD 2 // HD matrix i.e. BT709
1097
1098///\defgroup define_clockinfo_flags Clock flags
1099/// Used by ADLAdapterODClockInfo.iFlag
1100/// @{
1101#define ADL_DL_CLOCKINFO_FLAG_FULLSCREEN3DONLY 0x00000001
1102#define ADL_DL_CLOCKINFO_FLAG_ALWAYSFULLSCREEN3D 0x00000002
1103#define ADL_DL_CLOCKINFO_FLAG_VPURECOVERYREDUCED 0x00000004
1104#define ADL_DL_CLOCKINFO_FLAG_THERMALPROTECTION 0x00000008
1105/// @}
1106
1107// Supported GPUs
1108// ADL_Display_PowerXpressActiveGPU_Get()
1109#define ADL_DL_POWERXPRESS_GPU_INTEGRATED 1
1110#define ADL_DL_POWERXPRESS_GPU_DISCRETE 2
1111
1112// Possible values for lpOperationResult
1113// ADL_Display_PowerXpressActiveGPU_Get()
1114#define ADL_DL_POWERXPRESS_SWITCH_RESULT_STARTED 1 // Switch procedure has been started - Windows platform only
1115#define ADL_DL_POWERXPRESS_SWITCH_RESULT_DECLINED 2 // Switch procedure cannot be started - All platforms
1116#define ADL_DL_POWERXPRESS_SWITCH_RESULT_ALREADY 3 // System already has required status - All platforms
1117#define ADL_DL_POWERXPRESS_SWITCH_RESULT_DEFERRED 5 // Switch was deferred and requires an X restart - Linux platform only
1118
1119// PowerXpress support version
1120// ADL_Display_PowerXpressVersion_Get()
1121#define ADL_DL_POWERXPRESS_VERSION_MAJOR 2 // Current PowerXpress support version 2.0
1122#define ADL_DL_POWERXPRESS_VERSION_MINOR 0
1123
1124#define ADL_DL_POWERXPRESS_VERSION (((ADL_DL_POWERXPRESS_VERSION_MAJOR) << 16) | ADL_DL_POWERXPRESS_VERSION_MINOR)
1125
1126//values for ADLThermalControllerInfo.iThermalControllerDomain
1127#define ADL_DL_THERMAL_DOMAIN_OTHER 0
1128#define ADL_DL_THERMAL_DOMAIN_GPU 1
1129
1130//values for ADLThermalControllerInfo.iFlags
1131#define ADL_DL_THERMAL_FLAG_INTERRUPT 1
1132#define ADL_DL_THERMAL_FLAG_FANCONTROL 2
1133
1134///\defgroup define_fanctrl Fan speed cotrol
1135/// Values for ADLFanSpeedInfo.iFlags
1136/// @{
1137#define ADL_DL_FANCTRL_SUPPORTS_PERCENT_READ 1
1138#define ADL_DL_FANCTRL_SUPPORTS_PERCENT_WRITE 2
1139#define ADL_DL_FANCTRL_SUPPORTS_RPM_READ 4
1140#define ADL_DL_FANCTRL_SUPPORTS_RPM_WRITE 8
1141/// @}
1142
1143//values for ADLFanSpeedValue.iSpeedType
1144#define ADL_DL_FANCTRL_SPEED_TYPE_PERCENT 1
1145#define ADL_DL_FANCTRL_SPEED_TYPE_RPM 2
1146
1147//values for ADLFanSpeedValue.iFlags
1148#define ADL_DL_FANCTRL_FLAG_USER_DEFINED_SPEED 1
1149
1150// MVPU interfaces
1151#define ADL_DL_MAX_MVPU_ADAPTERS 4
1152#define MVPU_ADAPTER_0 0x00000001
1153#define MVPU_ADAPTER_1 0x00000002
1154#define MVPU_ADAPTER_2 0x00000004
1155#define MVPU_ADAPTER_3 0x00000008
1156#define ADL_DL_MAX_REGISTRY_PATH 256
1157
1158//values for ADLMVPUStatus.iStatus
1159#define ADL_DL_MVPU_STATUS_OFF 0
1160#define ADL_DL_MVPU_STATUS_ON 1
1161
1162// values for ASIC family
1163///\defgroup define_Asic_type Detailed asic types
1164/// Defines for Adapter ASIC family type
1165/// @{
1166#define ADL_ASIC_UNDEFINED 0
1167#define ADL_ASIC_DISCRETE (1 << 0)
1168#define ADL_ASIC_INTEGRATED (1 << 1)
1169#define ADL_ASIC_WORKSTATION (1 << 2)
1170#define ADL_ASIC_FIREMV (1 << 3)
1171#define ADL_ASIC_XGP (1 << 4)
1172#define ADL_ASIC_FUSION (1 << 5)
1173#define ADL_ASIC_FIRESTREAM (1 << 6)
1174#define ADL_ASIC_EMBEDDED (1 << 7)
1175// Backward compatibility
1176#define ADL_ASIC_FIREGL ADL_ASIC_WORKSTATION
1177/// @}
1178
1179///\defgroup define_detailed_timing_flags Detailed Timimg Flags
1180/// Defines for ADLDetailedTiming.sTimingFlags field
1181/// @{
1182#define ADL_DL_TIMINGFLAG_DOUBLE_SCAN 0x0001
1183//sTimingFlags is set when the mode is INTERLACED, if not PROGRESSIVE
1184#define ADL_DL_TIMINGFLAG_INTERLACED 0x0002
1185//sTimingFlags is set when the Horizontal Sync is POSITIVE, if not NEGATIVE
1186#define ADL_DL_TIMINGFLAG_H_SYNC_POLARITY 0x0004
1187//sTimingFlags is set when the Vertical Sync is POSITIVE, if not NEGATIVE
1188#define ADL_DL_TIMINGFLAG_V_SYNC_POLARITY 0x0008
1189/// @}
1190
1191///\defgroup define_modetiming_standard Timing Standards
1192/// Defines for ADLDisplayModeInfo.iTimingStandard field
1193/// @{
1194#define ADL_DL_MODETIMING_STANDARD_CVT 0x00000001 // CVT Standard
1195#define ADL_DL_MODETIMING_STANDARD_GTF 0x00000002 // GFT Standard
1196#define ADL_DL_MODETIMING_STANDARD_DMT 0x00000004 // DMT Standard
1197#define ADL_DL_MODETIMING_STANDARD_CUSTOM 0x00000008 // User-defined standard
1198#define ADL_DL_MODETIMING_STANDARD_DRIVER_DEFAULT 0x00000010 // Remove Mode from overriden list
1199#define ADL_DL_MODETIMING_STANDARD_CVT_RB 0x00000020 // CVT-RB Standard
1200/// @}
1201
1202// \defgroup define_xserverinfo driver x-server info
1203/// These flags are used by ADL_XServerInfo_Get()
1204// @
1205
1206/// Xinerama is active in the x-server, Xinerama extension may report it to be active but it
1207/// may not be active in x-server
1208#define ADL_XSERVERINFO_XINERAMAACTIVE (1<<0)
1209
1210/// RandR 1.2 is supported by driver, RandR extension may report version 1.2
1211/// but driver may not support it
1212#define ADL_XSERVERINFO_RANDR12SUPPORTED (1<<1)
1213// @
1214
1215
1216///\defgroup define_eyefinity_constants Eyefinity Definitions
1217/// @{
1218
1219#define ADL_CONTROLLERVECTOR_0 1 // ADL_CONTROLLERINDEX_0 = 0, (1 << ADL_CONTROLLERINDEX_0)
1220#define ADL_CONTROLLERVECTOR_1 2 // ADL_CONTROLLERINDEX_1 = 1, (1 << ADL_CONTROLLERINDEX_1)
1221
1222#define ADL_DISPLAY_SLSGRID_ORIENTATION_000 0x00000001
1223#define ADL_DISPLAY_SLSGRID_ORIENTATION_090 0x00000002
1224#define ADL_DISPLAY_SLSGRID_ORIENTATION_180 0x00000004
1225#define ADL_DISPLAY_SLSGRID_ORIENTATION_270 0x00000008
1226#define ADL_DISPLAY_SLSGRID_CAP_OPTION_RELATIVETO_LANDSCAPE 0x00000001
1227#define ADL_DISPLAY_SLSGRID_CAP_OPTION_RELATIVETO_CURRENTANGLE 0x00000002
1228#define ADL_DISPLAY_SLSGRID_PORTAIT_MODE 0x00000004
1229#define ADL_DISPLAY_SLSGRID_KEEPTARGETROTATION 0x00000080
1230
1231#define ADL_DISPLAY_SLSGRID_SAMEMODESLS_SUPPORT 0x00000010
1232#define ADL_DISPLAY_SLSGRID_MIXMODESLS_SUPPORT 0x00000020
1233#define ADL_DISPLAY_SLSGRID_DISPLAYROTATION_SUPPORT 0x00000040
1234#define ADL_DISPLAY_SLSGRID_DESKTOPROTATION_SUPPORT 0x00000080
1235
1236
1237#define ADL_DISPLAY_SLSMAP_SLSLAYOUTMODE_FIT 0x0100
1238#define ADL_DISPLAY_SLSMAP_SLSLAYOUTMODE_FILL 0x0200
1239#define ADL_DISPLAY_SLSMAP_SLSLAYOUTMODE_EXPAND 0x0400
1240
1241#define ADL_DISPLAY_SLSMAP_IS_SLS 0x1000
1242#define ADL_DISPLAY_SLSMAP_IS_SLSBUILDER 0x2000
1243#define ADL_DISPLAY_SLSMAP_IS_CLONEVT 0x4000
1244
1245#define ADL_DISPLAY_SLSMAPCONFIG_GET_OPTION_RELATIVETO_LANDSCAPE 0x00000001
1246#define ADL_DISPLAY_SLSMAPCONFIG_GET_OPTION_RELATIVETO_CURRENTANGLE 0x00000002
1247
1248#define ADL_DISPLAY_SLSMAPCONFIG_CREATE_OPTION_RELATIVETO_LANDSCAPE 0x00000001
1249#define ADL_DISPLAY_SLSMAPCONFIG_CREATE_OPTION_RELATIVETO_CURRENTANGLE 0x00000002
1250
1251#define ADL_DISPLAY_SLSMAPCONFIG_REARRANGE_OPTION_RELATIVETO_LANDSCAPE 0x00000001
1252#define ADL_DISPLAY_SLSMAPCONFIG_REARRANGE_OPTION_RELATIVETO_CURRENTANGLE 0x00000002
1253
1254#define ADL_SLS_SAMEMODESLS_SUPPORT 0x0001
1255#define ADL_SLS_MIXMODESLS_SUPPORT 0x0002
1256#define ADL_SLS_DISPLAYROTATIONSLS_SUPPORT 0x0004
1257#define ADL_SLS_DESKTOPROTATIONSLS_SUPPORT 0x0008
1258
1259#define ADL_SLS_TARGETS_INVALID 0x0001
1260#define ADL_SLS_MODES_INVALID 0x0002
1261#define ADL_SLS_ROTATIONS_INVALID 0x0004
1262#define ADL_SLS_POSITIONS_INVALID 0x0008
1263#define ADL_SLS_LAYOUTMODE_INVALID 0x0010
1264
1265#define ADL_DISPLAY_SLSDISPLAYOFFSET_VALID 0x0002
1266
1267#define ADL_DISPLAY_SLSGRID_RELATIVETO_LANDSCAPE 0x00000010
1268#define ADL_DISPLAY_SLSGRID_RELATIVETO_CURRENTANGLE 0x00000020
1269
1270
1271/// The bit mask identifies displays is currently in bezel mode.
1272#define ADL_DISPLAY_SLSMAP_BEZELMODE 0x00000010
1273/// The bit mask identifies displays from this map is arranged.
1274#define ADL_DISPLAY_SLSMAP_DISPLAYARRANGED 0x00000002
1275/// The bit mask identifies this map is currently in used for the current adapter.
1276#define ADL_DISPLAY_SLSMAP_CURRENTCONFIG 0x00000004
1277
1278///For onlay active SLS map info
1279#define ADL_DISPLAY_SLSMAPINDEXLIST_OPTION_ACTIVE 0x00000001
1280
1281///For Bezel
1282#define ADL_DISPLAY_BEZELOFFSET_STEPBYSTEPSET 0x00000004
1283#define ADL_DISPLAY_BEZELOFFSET_COMMIT 0x00000008
1284
1285typedef enum SLS_ImageCropType {
1286 Fit = 1,
1287 Fill = 2,
1288 Expand = 3
1289}SLS_ImageCropType;
1290
1291
1292typedef enum DceSettingsType {
1293 DceSetting_HdmiLq,
1294 DceSetting_DpSettings,
1295 DceSetting_Protection
1296
1297} DceSettingsType;
1298
1299typedef enum DpLinkRate {
1300 DPLinkRate_Unknown,
1301 DPLinkRate_RBR,
1302 DPLinkRate_2_16Gbps,
1303 DPLinkRate_2_43Gbps,
1304 DPLinkRate_HBR,
1305 DPLinkRate_4_32Gbps,
1306 DPLinkRate_HBR2,
1307 DPLinkRate_HBR3,
1308 DPLinkRate_UHBR10,
1309 DPLinkRate_UHBR13D5,
1310 DPLinkRate_UHBR20
1311
1312} DpLinkRate;
1313
1314/// @}
1315
1316///\defgroup define_powerxpress_constants PowerXpress Definitions
1317/// @{
1318
1319/// The bit mask identifies PX caps for ADLPXConfigCaps.iPXConfigCapMask and ADLPXConfigCaps.iPXConfigCapValue
1320#define ADL_PX_CONFIGCAPS_SPLASHSCREEN_SUPPORT 0x0001
1321#define ADL_PX_CONFIGCAPS_CF_SUPPORT 0x0002
1322#define ADL_PX_CONFIGCAPS_MUXLESS 0x0004
1323#define ADL_PX_CONFIGCAPS_PROFILE_COMPLIANT 0x0008
1324#define ADL_PX_CONFIGCAPS_NON_AMD_DRIVEN_DISPLAYS 0x0010
1325#define ADL_PX_CONFIGCAPS_FIXED_SUPPORT 0x0020
1326#define ADL_PX_CONFIGCAPS_DYNAMIC_SUPPORT 0x0040
1327#define ADL_PX_CONFIGCAPS_HIDE_AUTO_SWITCH 0x0080
1328
1329/// The bit mask identifies PX schemes for ADLPXSchemeRange
1330#define ADL_PX_SCHEMEMASK_FIXED 0x0001
1331#define ADL_PX_SCHEMEMASK_DYNAMIC 0x0002
1332
1333/// PX Schemes
1334typedef enum ADLPXScheme
1335{
1336 ADL_PX_SCHEME_INVALID = 0,
1337 ADL_PX_SCHEME_FIXED = ADL_PX_SCHEMEMASK_FIXED,
1338 ADL_PX_SCHEME_DYNAMIC = ADL_PX_SCHEMEMASK_DYNAMIC
1339}ADLPXScheme;
1340
1341/// Just keep the old definitions for compatibility, need to be removed later
1342typedef enum PXScheme
1343{
1344 PX_SCHEME_INVALID = 0,
1345 PX_SCHEME_FIXED = 1,
1346 PX_SCHEME_DYNAMIC = 2
1347} PXScheme;
1348
1349
1350/// @}
1351
1352///\defgroup define_appprofiles For Application Profiles
1353/// @{
1354
1355#define ADL_APP_PROFILE_FILENAME_LENGTH 256
1356#define ADL_APP_PROFILE_TIMESTAMP_LENGTH 32
1357#define ADL_APP_PROFILE_VERSION_LENGTH 32
1358#define ADL_APP_PROFILE_PROPERTY_LENGTH 64
1359
1360enum ApplicationListType
1361{
1362 ADL_PX40_MRU,
1363 ADL_PX40_MISSED,
1364 ADL_PX40_DISCRETE,
1365 ADL_PX40_INTEGRATED,
1366 ADL_MMD_PROFILED,
1367 ADL_PX40_TOTAL
1368};
1369
1370typedef enum ADLProfilePropertyType
1371{
1372 ADL_PROFILEPROPERTY_TYPE_BINARY = 0,
1373 ADL_PROFILEPROPERTY_TYPE_BOOLEAN,
1374 ADL_PROFILEPROPERTY_TYPE_DWORD,
1375 ADL_PROFILEPROPERTY_TYPE_QWORD,
1376 ADL_PROFILEPROPERTY_TYPE_ENUMERATED,
1377 ADL_PROFILEPROPERTY_TYPE_STRING
1378}ADLProfilePropertyType;
1379
1380
1381//Virtual display type returning virtual display type and for request for creating a dummy target ID (xInput or remote play)
1382typedef enum ADL_VIRTUALDISPLAY_TYPE
1383{
1384 ADL_VIRTUALDISPLAY_NONE = 0,
1385 ADL_VIRTUALDISPLAY_XINPUT = 1, //Requested for xInput
1386 ADL_VIRTUALDISPLAY_REMOTEPLAY = 2, //Requested for emulated display during remote play
1387 ADL_VIRTUALDISPLAY_GENERIC = 10 //Generic virtual display, af a type different than any of the above special ones
1388}ADL_VIRTUALDISPLAY_TYPE;
1389
1390/// @}
1391
1392///\defgroup define_dp12 For Display Port 1.2
1393/// @{
1394
1395/// Maximum Relative Address Link
1396#define ADL_MAX_RAD_LINK_COUNT 15
1397
1398/// @}
1399
1400///\defgroup defines_gamutspace Driver Supported Gamut Space
1401/// @{
1402
1403/// The flags desribes that gamut is related to source or to destination and to overlay or to graphics
1404#define ADL_GAMUT_REFERENCE_SOURCE (1 << 0)
1405#define ADL_GAMUT_GAMUT_VIDEO_CONTENT (1 << 1)
1406
1407/// The flags are used to describe the source of gamut and how read information from struct ADLGamutData
1408#define ADL_CUSTOM_WHITE_POINT (1 << 0)
1409#define ADL_CUSTOM_GAMUT (1 << 1)
1410#define ADL_GAMUT_REMAP_ONLY (1 << 2)
1411
1412/// The define means the predefined gamut values .
1413///Driver uses to find entry in the table and apply appropriate gamut space.
1414#define ADL_GAMUT_SPACE_CCIR_709 (1 << 0)
1415#define ADL_GAMUT_SPACE_CCIR_601 (1 << 1)
1416#define ADL_GAMUT_SPACE_ADOBE_RGB (1 << 2)
1417#define ADL_GAMUT_SPACE_CIE_RGB (1 << 3)
1418#define ADL_GAMUT_SPACE_CUSTOM (1 << 4)
1419#define ADL_GAMUT_SPACE_CCIR_2020 (1 << 5)
1420#define ADL_GAMUT_SPACE_APPCTRL (1 << 6)
1421
1422/// Predefine white point values are structed similar to gamut .
1423#define ADL_WHITE_POINT_5000K (1 << 0)
1424#define ADL_WHITE_POINT_6500K (1 << 1)
1425#define ADL_WHITE_POINT_7500K (1 << 2)
1426#define ADL_WHITE_POINT_9300K (1 << 3)
1427#define ADL_WHITE_POINT_CUSTOM (1 << 4)
1428
1429///gamut and white point coordinates are from 0.0 -1.0 and divider is used to find the real value .
1430/// X float = X int /divider
1431#define ADL_GAMUT_WHITEPOINT_DIVIDER 10000
1432
1433///gamma a0 coefficient uses the following divider:
1434#define ADL_REGAMMA_COEFFICIENT_A0_DIVIDER 10000000
1435///gamma a1 ,a2,a3 coefficients use the following divider:
1436#define ADL_REGAMMA_COEFFICIENT_A1A2A3_DIVIDER 1000
1437
1438///describes whether the coefficients are from EDID or custom user values.
1439#define ADL_EDID_REGAMMA_COEFFICIENTS (1 << 0)
1440///Used for struct ADLRegamma. Feature if set use gamma ramp, if missing use regamma coefficents
1441#define ADL_USE_GAMMA_RAMP (1 << 4)
1442///Used for struct ADLRegamma. If the gamma ramp flag is used then the driver could apply de gamma corretion to the supplied curve and this depends on this flag
1443#define ADL_APPLY_DEGAMMA (1 << 5)
1444///specifies that standard SRGB gamma should be applied
1445#define ADL_EDID_REGAMMA_PREDEFINED_SRGB (1 << 1)
1446///specifies that PQ gamma curve should be applied
1447#define ADL_EDID_REGAMMA_PREDEFINED_PQ (1 << 2)
1448///specifies that PQ gamma curve should be applied, lower max nits
1449#define ADL_EDID_REGAMMA_PREDEFINED_PQ_2084_INTERIM (1 << 3)
1450///specifies that 3.6 gamma should be applied
1451#define ADL_EDID_REGAMMA_PREDEFINED_36 (1 << 6)
1452///specifies that BT709 gama should be applied
1453#define ADL_EDID_REGAMMA_PREDEFINED_BT709 (1 << 7)
1454///specifies that regamma should be disabled, and application controls regamma content (of the whole screen)
1455#define ADL_EDID_REGAMMA_PREDEFINED_APPCTRL (1 << 8)
1456
1457/// @}
1458
1459/// \defgroup define_ddcinfo_pixelformats DDCInfo Pixel Formats
1460/// @{
1461/// defines for iPanelPixelFormat in struct ADLDDCInfo2
1462#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB656 0x00000001L
1463#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB666 0x00000002L
1464#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB888 0x00000004L
1465#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB101010 0x00000008L
1466#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB161616 0x00000010L
1467#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB_RESERVED1 0x00000020L
1468#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB_RESERVED2 0x00000040L
1469#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB_RESERVED3 0x00000080L
1470#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_XRGB_BIAS101010 0x00000100L
1471#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR444_8BPCC 0x00000200L
1472#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR444_10BPCC 0x00000400L
1473#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR444_12BPCC 0x00000800L
1474#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR422_8BPCC 0x00001000L
1475#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR422_10BPCC 0x00002000L
1476#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR422_12BPCC 0x00004000L
1477#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR420_8BPCC 0x00008000L
1478#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR420_10BPCC 0x00010000L
1479#define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR420_12BPCC 0x00020000L
1480/// @}
1481
1482/// \defgroup define_source_content_TF ADLSourceContentAttributes transfer functions (gamma)
1483/// @{
1484/// defines for iTransferFunction in ADLSourceContentAttributes
1485#define ADL_TF_sRGB 0x0001 ///< sRGB
1486#define ADL_TF_BT709 0x0002 ///< BT.709
1487#define ADL_TF_PQ2084 0x0004 ///< PQ2084
1488#define ADL_TF_PQ2084_INTERIM 0x0008 ///< PQ2084-Interim
1489#define ADL_TF_LINEAR_0_1 0x0010 ///< Linear 0 - 1
1490#define ADL_TF_LINEAR_0_125 0x0020 ///< Linear 0 - 125
1491#define ADL_TF_DOLBYVISION 0x0040 ///< DolbyVision
1492#define ADL_TF_GAMMA_22 0x0080 ///< Plain 2.2 gamma curve
1493/// @}
1494
1495/// \defgroup define_source_content_CS ADLSourceContentAttributes color spaces
1496/// @{
1497/// defines for iColorSpace in ADLSourceContentAttributes
1498#define ADL_CS_sRGB 0x0001 ///< sRGB
1499#define ADL_CS_BT601 0x0002 ///< BT.601
1500#define ADL_CS_BT709 0x0004 ///< BT.709
1501#define ADL_CS_BT2020 0x0008 ///< BT.2020
1502#define ADL_CS_ADOBE 0x0010 ///< Adobe RGB
1503#define ADL_CS_P3 0x0020 ///< DCI-P3
1504#define ADL_CS_scRGB_MS_REF 0x0040 ///< scRGB (MS Reference)
1505#define ADL_CS_DISPLAY_NATIVE 0x0080 ///< Display Native
1506#define ADL_CS_APP_CONTROL 0x0100 ///< Application Controlled
1507#define ADL_CS_DOLBYVISION 0x0200 ///< DolbyVision
1508/// @}
1509
1510/// \defgroup define_HDR_support ADLDDCInfo2 HDR support options
1511/// @{
1512/// defines for iSupportedHDR in ADLDDCInfo2
1513#define ADL_HDR_CEA861_3 0x0001 ///< HDR10/CEA861.3 HDR supported
1514#define ADL_HDR_DOLBYVISION 0x0002 ///< \deprecated DolbyVision HDR supported
1515#define ADL_HDR_FREESYNC_HDR 0x0004 ///< FreeSync HDR supported
1516/// @}
1517
1518/// \defgroup define_FreesyncFlags ADLDDCInfo2 Freesync HDR flags
1519/// @{
1520/// defines for iFreesyncFlags in ADLDDCInfo2
1521#define ADL_HDR_FREESYNC_BACKLIGHT_SUPPORT 0x0001 ///< Global backlight control supported
1522#define ADL_HDR_FREESYNC_LOCAL_DIMMING 0x0002 ///< Local dimming supported
1523/// @}
1524
1525/// \defgroup define_source_content_flags ADLSourceContentAttributes flags
1526/// @{
1527/// defines for iFlags in ADLSourceContentAttributes
1528#define ADL_SCA_LOCAL_DIMMING_DISABLE 0x0001 ///< Disable local dimming
1529/// @}
1530
1531/// \defgroup define_dbd_state Deep Bit Depth
1532/// @{
1533
1534/// defines for ADL_Workstation_DeepBitDepth_Get and ADL_Workstation_DeepBitDepth_Set functions
1535// This value indicates that the deep bit depth state is forced off
1536#define ADL_DEEPBITDEPTH_FORCEOFF 0
1537/// This value indicates that the deep bit depth state is set to auto, the driver will automatically enable the
1538/// appropriate deep bit depth state depending on what connected display supports.
1539#define ADL_DEEPBITDEPTH_10BPP_AUTO 1
1540/// This value indicates that the deep bit depth state is forced on to 10 bits per pixel, this is regardless if the display
1541/// supports 10 bpp.
1542#define ADL_DEEPBITDEPTH_10BPP_FORCEON 2
1543
1544/// defines for ADLAdapterConfigMemory of ADL_Adapter_ConfigMemory_Get
1545/// If this bit is set, it indicates that the Deep Bit Depth pixel is set on the display
1546#define ADL_ADAPTER_CONFIGMEMORY_DBD (1 << 0)
1547/// If this bit is set, it indicates that the display is rotated (90, 180 or 270)
1548#define ADL_ADAPTER_CONFIGMEMORY_ROTATE (1 << 1)
1549/// If this bit is set, it indicates that passive stereo is set on the display
1550#define ADL_ADAPTER_CONFIGMEMORY_STEREO_PASSIVE (1 << 2)
1551/// If this bit is set, it indicates that the active stereo is set on the display
1552#define ADL_ADAPTER_CONFIGMEMORY_STEREO_ACTIVE (1 << 3)
1553/// If this bit is set, it indicates that the tear free vsync is set on the display
1554#define ADL_ADAPTER_CONFIGMEMORY_ENHANCEDVSYNC (1 << 4)
1555#define ADL_ADAPTER_CONFIGMEMORY_TEARFREEVSYNC (1 << 4)
1556/// @}
1557
1558/// \defgroup define_adl_validmemoryrequiredfields Memory Type
1559/// @{
1560
1561/// This group defines memory types in ADLMemoryRequired struct \n
1562/// Indicates that this is the visible memory
1563#define ADL_MEMORYREQTYPE_VISIBLE (1 << 0)
1564/// Indicates that this is the invisible memory.
1565#define ADL_MEMORYREQTYPE_INVISIBLE (1 << 1)
1566/// Indicates that this is amount of visible memory per GPU that should be reserved for all other allocations.
1567#define ADL_MEMORYREQTYPE_GPURESERVEDVISIBLE (1 << 2)
1568/// @}
1569
1570/// \defgroup define_adapter_tear_free_status
1571/// Used in ADL_Adapter_TEAR_FREE_Set and ADL_Adapter_TFD_Get functions to indicate the tear free
1572/// desktop status.
1573/// @{
1574/// Tear free desktop is enabled.
1575#define ADL_ADAPTER_TEAR_FREE_ON 1
1576/// Tear free desktop can't be enabled due to a lack of graphic adapter memory.
1577#define ADL_ADAPTER_TEAR_FREE_NOTENOUGHMEM -1
1578/// Tear free desktop can't be enabled due to quad buffer stereo being enabled.
1579#define ADL_ADAPTER_TEAR_FREE_OFF_ERR_QUADBUFFERSTEREO -2
1580/// Tear free desktop can't be enabled due to MGPU-SLS being enabled.
1581#define ADL_ADAPTER_TEAR_FREE_OFF_ERR_MGPUSLD -3
1582/// Tear free desktop is disabled.
1583#define ADL_ADAPTER_TEAR_FREE_OFF 0
1584/// @}
1585
1586/// \defgroup define_adapter_crossdisplay_platforminfo
1587/// Used in ADL_Adapter_CrossDisplayPlatformInfo_Get function to indicate the Crossdisplay platform info.
1588/// @{
1589/// CROSSDISPLAY platform.
1590#define ADL_CROSSDISPLAY_PLATFORM (1 << 0)
1591/// CROSSDISPLAY platform for Lasso station.
1592#define ADL_CROSSDISPLAY_PLATFORM_LASSO (1 << 1)
1593/// CROSSDISPLAY platform for docking station.
1594#define ADL_CROSSDISPLAY_PLATFORM_DOCKSTATION (1 << 2)
1595/// @}
1596
1597/// \defgroup define_adapter_crossdisplay_option
1598/// Used in ADL_Adapter_CrossdisplayInfoX2_Set function to indicate cross display options.
1599/// @{
1600/// Checking if 3D application is runnning. If yes, not to do switch, return ADL_OK_WAIT; otherwise do switch.
1601#define ADL_CROSSDISPLAY_OPTION_NONE 0
1602/// Force switching without checking for running 3D applications
1603#define ADL_CROSSDISPLAY_OPTION_FORCESWITCH (1 << 0)
1604/// @}
1605
1606/// \defgroup define_adapter_states Adapter Capabilities
1607/// These defines the capabilities supported by an adapter. It is used by \ref ADL_Adapter_ConfigureState_Get
1608/// @{
1609/// Indicates that the adapter is headless (i.e. no displays can be connected to it)
1610#define ADL_ADAPTERCONFIGSTATE_HEADLESS ( 1 << 2 )
1611/// Indicates that the adapter is configured to define the main rendering capabilities. For example, adapters
1612/// in Crossfire(TM) configuration, this bit would only be set on the adapter driving the display(s).
1613#define ADL_ADAPTERCONFIGSTATE_REQUISITE_RENDER ( 1 << 0 )
1614/// Indicates that the adapter is configured to be used to unload some of the rendering work for a particular
1615/// requisite rendering adapter. For eample, for adapters in a Crossfire configuration, this bit would be set
1616/// on all adapters that are currently not driving the display(s)
1617#define ADL_ADAPTERCONFIGSTATE_ANCILLARY_RENDER ( 1 << 1 )
1618/// Indicates that scatter gather feature enabled on the adapter
1619#define ADL_ADAPTERCONFIGSTATE_SCATTERGATHER ( 1 << 4 )
1620/// @}
1621
1622/// \defgroup define_controllermode_ulModifiers
1623/// These defines the detailed actions supported by set viewport. It is used by \ref ADL_Display_ViewPort_Set
1624/// @{
1625/// Indicate that the viewport set will change the view position
1626#define ADL_CONTROLLERMODE_CM_MODIFIER_VIEW_POSITION 0x00000001
1627/// Indicate that the viewport set will change the view PanLock
1628#define ADL_CONTROLLERMODE_CM_MODIFIER_VIEW_PANLOCK 0x00000002
1629/// Indicate that the viewport set will change the view size
1630#define ADL_CONTROLLERMODE_CM_MODIFIER_VIEW_SIZE 0x00000008
1631/// @}
1632
1633/// \defgroup defines for Mirabilis
1634/// These defines are used for the Mirabilis feature
1635/// @{
1636///
1637/// Indicates the maximum number of audio sample rates
1638#define ADL_MAX_AUDIO_SAMPLE_RATE_COUNT 16
1639/// @}
1640
1641///////////////////////////////////////////////////////////////////////////
1642// ADLMultiChannelSplitStateFlag Enumeration
1643///////////////////////////////////////////////////////////////////////////
1644enum ADLMultiChannelSplitStateFlag
1645{
1646 ADLMultiChannelSplit_Unitialized = 0,
1647 ADLMultiChannelSplit_Disabled = 1,
1648 ADLMultiChannelSplit_Enabled = 2,
1649 ADLMultiChannelSplit_SaveProfile = 3
1650};
1651
1652///////////////////////////////////////////////////////////////////////////
1653// ADLSampleRate Enumeration
1654///////////////////////////////////////////////////////////////////////////
1655enum ADLSampleRate
1656{
1657 ADLSampleRate_32KHz =0,
1658 ADLSampleRate_44P1KHz,
1659 ADLSampleRate_48KHz,
1660 ADLSampleRate_88P2KHz,
1661 ADLSampleRate_96KHz,
1662 ADLSampleRate_176P4KHz,
1663 ADLSampleRate_192KHz,
1664 ADLSampleRate_384KHz, //DP1.2
1665 ADLSampleRate_768KHz, //DP1.2
1666 ADLSampleRate_Undefined
1667};
1668
1669/// \defgroup define_overdrive6_capabilities
1670/// These defines the capabilities supported by Overdrive 6. It is used by \ref ADL_Overdrive6_Capabilities_Get
1671/// @{
1672/// Indicate that core (engine) clock can be changed.
1673#define ADL_OD6_CAPABILITY_SCLK_CUSTOMIZATION 0x00000001
1674/// Indicate that memory clock can be changed.
1675#define ADL_OD6_CAPABILITY_MCLK_CUSTOMIZATION 0x00000002
1676/// Indicate that graphics activity reporting is supported.
1677#define ADL_OD6_CAPABILITY_GPU_ACTIVITY_MONITOR 0x00000004
1678/// Indicate that power limit can be customized.
1679#define ADL_OD6_CAPABILITY_POWER_CONTROL 0x00000008
1680/// Indicate that SVI2 Voltage Control is supported.
1681#define ADL_OD6_CAPABILITY_VOLTAGE_CONTROL 0x00000010
1682/// Indicate that OD6+ percentage adjustment is supported.
1683#define ADL_OD6_CAPABILITY_PERCENT_ADJUSTMENT 0x00000020
1684/// Indicate that Thermal Limit Unlock is supported.
1685#define ADL_OD6_CAPABILITY_THERMAL_LIMIT_UNLOCK 0x00000040
1686///Indicate that Fan speed needs to be displayed in RPM
1687#define ADL_OD6_CAPABILITY_FANSPEED_IN_RPM 0x00000080
1688/// @}
1689
1690/// \defgroup define_overdrive6_supported_states
1691/// These defines the power states supported by Overdrive 6. It is used by \ref ADL_Overdrive6_Capabilities_Get
1692/// @{
1693/// Indicate that overdrive is supported in the performance state. This is currently the only state supported.
1694#define ADL_OD6_SUPPORTEDSTATE_PERFORMANCE 0x00000001
1695/// Do not use. Reserved for future use.
1696#define ADL_OD6_SUPPORTEDSTATE_POWER_SAVING 0x00000002
1697/// @}
1698
1699/// \defgroup define_overdrive6_getstateinfo
1700/// These defines the power states to get information about. It is used by \ref ADL_Overdrive6_StateInfo_Get
1701/// @{
1702/// Get default clocks for the performance state.
1703#define ADL_OD6_GETSTATEINFO_DEFAULT_PERFORMANCE 0x00000001
1704/// Do not use. Reserved for future use.
1705#define ADL_OD6_GETSTATEINFO_DEFAULT_POWER_SAVING 0x00000002
1706/// Get clocks for current state. Currently this is the same as \ref ADL_OD6_GETSTATEINFO_CUSTOM_PERFORMANCE
1707/// since only performance state is supported.
1708#define ADL_OD6_GETSTATEINFO_CURRENT 0x00000003
1709/// Get the modified clocks (if any) for the performance state. If clocks were not modified
1710/// through Overdrive 6, then this will return the same clocks as \ref ADL_OD6_GETSTATEINFO_DEFAULT_PERFORMANCE.
1711#define ADL_OD6_GETSTATEINFO_CUSTOM_PERFORMANCE 0x00000004
1712/// Do not use. Reserved for future use.
1713#define ADL_OD6_GETSTATEINFO_CUSTOM_POWER_SAVING 0x00000005
1714/// @}
1715
1716/// \defgroup define_overdrive6_getstate and define_overdrive6_getmaxclockadjust
1717/// These defines the power states to get information about. It is used by \ref ADL_Overdrive6_StateEx_Get and \ref ADL_Overdrive6_MaxClockAdjust_Get
1718/// @{
1719/// Get default clocks for the performance state. Only performance state is currently supported.
1720#define ADL_OD6_STATE_PERFORMANCE 0x00000001
1721/// @}
1722
1723/// \defgroup define_overdrive6_setstate
1724/// These define which power state to set customized clocks on. It is used by \ref ADL_Overdrive6_State_Set
1725/// @{
1726/// Set customized clocks for the performance state.
1727#define ADL_OD6_SETSTATE_PERFORMANCE 0x00000001
1728/// Do not use. Reserved for future use.
1729#define ADL_OD6_SETSTATE_POWER_SAVING 0x00000002
1730/// @}
1731
1732/// \defgroup define_overdrive6_thermalcontroller_caps
1733/// These defines the capabilities of the GPU thermal controller. It is used by \ref ADL_Overdrive6_ThermalController_Caps
1734/// @{
1735/// GPU thermal controller is supported.
1736#define ADL_OD6_TCCAPS_THERMAL_CONTROLLER 0x00000001
1737/// GPU fan speed control is supported.
1738#define ADL_OD6_TCCAPS_FANSPEED_CONTROL 0x00000002
1739/// Fan speed percentage can be read.
1740#define ADL_OD6_TCCAPS_FANSPEED_PERCENT_READ 0x00000100
1741/// Fan speed can be set by specifying a percentage value.
1742#define ADL_OD6_TCCAPS_FANSPEED_PERCENT_WRITE 0x00000200
1743/// Fan speed RPM (revolutions-per-minute) can be read.
1744#define ADL_OD6_TCCAPS_FANSPEED_RPM_READ 0x00000400
1745/// Fan speed can be set by specifying an RPM value.
1746#define ADL_OD6_TCCAPS_FANSPEED_RPM_WRITE 0x00000800
1747/// @}
1748
1749/// \defgroup define_overdrive6_fanspeed_type
1750/// These defines the fan speed type being reported. It is used by \ref ADL_Overdrive6_FanSpeed_Get
1751/// @{
1752/// Fan speed reported in percentage.
1753#define ADL_OD6_FANSPEED_TYPE_PERCENT 0x00000001
1754/// Fan speed reported in RPM.
1755#define ADL_OD6_FANSPEED_TYPE_RPM 0x00000002
1756/// Fan speed has been customized by the user, and fan is not running in automatic mode.
1757#define ADL_OD6_FANSPEED_USER_DEFINED 0x00000100
1758/// @}
1759
1760/// \defgroup define_overdrive_EventCounter_type
1761/// These defines the EventCounter type being reported. It is used by \ref ADL2_OverdriveN_CountOfEvents_Get ,can be used on older OD version supported ASICs also.
1762/// @{
1763#define ADL_ODN_EVENTCOUNTER_THERMAL 0
1764#define ADL_ODN_EVENTCOUNTER_VPURECOVERY 1
1765/// @}
1766
1767///////////////////////////////////////////////////////////////////////////
1768// ADLODNControlType Enumeration
1769///////////////////////////////////////////////////////////////////////////
1770enum ADLODNControlType
1771{
1772 ODNControlType_Current = 0,
1773 ODNControlType_Default,
1774 ODNControlType_Auto,
1775 ODNControlType_Manual
1776};
1777
1778enum ADLODNDPMMaskType
1779{
1780 ADL_ODN_DPM_CLOCK = 1 << 0,
1781 ADL_ODN_DPM_VDDC = 1 << 1,
1782 ADL_ODN_DPM_MASK = 1 << 2,
1783};
1784
1785//ODN features Bits for ADLODNCapabilitiesX2
1786enum ADLODNFeatureControl
1787{
1788 ADL_ODN_SCLK_DPM = 1 << 0,
1789 ADL_ODN_MCLK_DPM = 1 << 1,
1790 ADL_ODN_SCLK_VDD = 1 << 2,
1791 ADL_ODN_MCLK_VDD = 1 << 3,
1792 ADL_ODN_FAN_SPEED_MIN = 1 << 4,
1793 ADL_ODN_FAN_SPEED_TARGET = 1 << 5,
1794 ADL_ODN_ACOUSTIC_LIMIT_SCLK = 1 << 6,
1795 ADL_ODN_TEMPERATURE_FAN_MAX = 1 << 7,
1796 ADL_ODN_TEMPERATURE_SYSTEM = 1 << 8,
1797 ADL_ODN_POWER_LIMIT = 1 << 9,
1798 ADL_ODN_SCLK_AUTO_LIMIT = 1 << 10,
1799 ADL_ODN_MCLK_AUTO_LIMIT = 1 << 11,
1800 ADL_ODN_SCLK_DPM_MASK_ENABLE = 1 << 12,
1801 ADL_ODN_MCLK_DPM_MASK_ENABLE = 1 << 13,
1802 ADL_ODN_MCLK_UNDERCLOCK_ENABLE = 1 << 14,
1803 ADL_ODN_SCLK_DPM_THROTTLE_NOTIFY = 1 << 15,
1804 ADL_ODN_POWER_UTILIZATION = 1 << 16,
1805 ADL_ODN_PERF_TUNING_SLIDER = 1 << 17,
1806 ADL_ODN_REMOVE_WATTMAN_PAGE = 1 << 31 // Internal Only
1807};
1808
1809//If any new feature is added, PPLIB only needs to add ext feature ID and Item ID(Seeting ID). These IDs should match the drive defined in CWDDEPM.h
1810enum ADLODNExtFeatureControl
1811{
1812 ADL_ODN_EXT_FEATURE_MEMORY_TIMING_TUNE = 1 << 0,
1813 ADL_ODN_EXT_FEATURE_FAN_ZERO_RPM_CONTROL = 1 << 1,
1814 ADL_ODN_EXT_FEATURE_AUTO_UV_ENGINE = 1 << 2, //Auto under voltage
1815 ADL_ODN_EXT_FEATURE_AUTO_OC_ENGINE = 1 << 3, //Auto OC Enine
1816 ADL_ODN_EXT_FEATURE_AUTO_OC_MEMORY = 1 << 4, //Auto OC memory
1817 ADL_ODN_EXT_FEATURE_FAN_CURVE = 1 << 5 //Fan curve
1818
1819};
1820
1821//If any new feature is added, PPLIB only needs to add ext feature ID and Item ID(Seeting ID).These IDs should match the drive defined in CWDDEPM.h
1822enum ADLODNExtSettingId
1823{
1824 ADL_ODN_PARAMETER_AC_TIMING = 0,
1825 ADL_ODN_PARAMETER_FAN_ZERO_RPM_CONTROL,
1826 ADL_ODN_PARAMETER_AUTO_UV_ENGINE,
1827 ADL_ODN_PARAMETER_AUTO_OC_ENGINE,
1828 ADL_ODN_PARAMETER_AUTO_OC_MEMORY,
1829 ADL_ODN_PARAMETER_FAN_CURVE_TEMPERATURE_1,
1830 ADL_ODN_PARAMETER_FAN_CURVE_SPEED_1,
1831 ADL_ODN_PARAMETER_FAN_CURVE_TEMPERATURE_2,
1832 ADL_ODN_PARAMETER_FAN_CURVE_SPEED_2,
1833 ADL_ODN_PARAMETER_FAN_CURVE_TEMPERATURE_3,
1834 ADL_ODN_PARAMETER_FAN_CURVE_SPEED_3,
1835 ADL_ODN_PARAMETER_FAN_CURVE_TEMPERATURE_4,
1836 ADL_ODN_PARAMETER_FAN_CURVE_SPEED_4,
1837 ADL_ODN_PARAMETER_FAN_CURVE_TEMPERATURE_5,
1838 ADL_ODN_PARAMETER_FAN_CURVE_SPEED_5,
1839 ADL_ODN_POWERGAUGE,
1840 ODN_COUNT
1841
1842} ;
1843
1844//OD8 Capability features bits
1845enum ADLOD8FeatureControl
1846{
1847 ADL_OD8_GFXCLK_LIMITS = 1 << 0,
1848 ADL_OD8_GFXCLK_CURVE = 1 << 1,
1849 ADL_OD8_UCLK_MAX = 1 << 2,
1850 ADL_OD8_POWER_LIMIT = 1 << 3,
1851 ADL_OD8_ACOUSTIC_LIMIT_SCLK = 1 << 4, //FanMaximumRpm
1852 ADL_OD8_FAN_SPEED_MIN = 1 << 5, //FanMinimumPwm
1853 ADL_OD8_TEMPERATURE_FAN = 1 << 6, //FanTargetTemperature
1854 ADL_OD8_TEMPERATURE_SYSTEM = 1 << 7, //MaxOpTemp
1855 ADL_OD8_MEMORY_TIMING_TUNE = 1 << 8,
1856 ADL_OD8_FAN_ZERO_RPM_CONTROL = 1 << 9,
1857 ADL_OD8_AUTO_UV_ENGINE = 1 << 10, //Auto under voltage
1858 ADL_OD8_AUTO_OC_ENGINE = 1 << 11, //Auto overclock engine
1859 ADL_OD8_AUTO_OC_MEMORY = 1 << 12, //Auto overclock memory
1860 ADL_OD8_FAN_CURVE = 1 << 13, //Fan curve
1861 ADL_OD8_WS_AUTO_FAN_ACOUSTIC_LIMIT = 1 << 14, //Workstation Manual Fan controller
1862 ADL_OD8_GFXCLK_QUADRATIC_CURVE = 1 << 15,
1863 ADL_OD8_OPTIMIZED_GPU_POWER_MODE = 1 << 16,
1864 ADL_OD8_ODVOLTAGE_LIMIT = 1 << 17,
1865 ADL_OD8_ADV_OC_LIMITS = 1 << 18, //Advanced OC limits.
1866 ADL_OD8_PER_ZONE_GFX_VOLTAGE_OFFSET = 1 << 19, //Per Zone gfx voltage offset feature
1867 ADL_OD8_AUTO_CURVE_OPTIMIZER = 1 << 20, //Auto per zone tuning.
1868 ADL_OD8_GFX_VOLTAGE_LIMIT = 1 << 21, //Voltage limit slider
1869 ADL_OD8_TDC_LIMIT = 1 << 22, //TDC slider
1870 ADL_OD8_FULL_CONTROL_MODE = 1 << 23, //Full control
1871 ADL_OD8_POWER_SAVING_FEATURE_CONTROL = 1 << 24, //Power saving feature control
1872 ADL_OD8_ACTIMING_PARAMETERS_TUNE = 1 << 25, // AC Timing Parameters Tuning
1873 ADL_OD8_OVERDRIVE_INTERFACE = 1 << 26, // Version info feature ID for RSX, do not expose in ADL.
1874 ADL_OD8_AUTO_UV_ENGINE_V2 = 1 << 27, // Auto UV 2.0 with actual stress testing.
1875 ADL_OD8_POWER_GAUGE = 1 << 28 //Power Gauge
1876};
1877
1878typedef enum ADLOD8SettingId
1879{
1880 OD8_GFXCLK_FMAX = 0,
1881 OD8_GFXCLK_FMIN,
1882 OD8_GFXCLK_FREQ1,
1883 OD8_GFXCLK_VOLTAGE1,
1884 OD8_GFXCLK_FREQ2,
1885 OD8_GFXCLK_VOLTAGE2,
1886 OD8_GFXCLK_FREQ3,
1887 OD8_GFXCLK_VOLTAGE3,
1888 OD8_UCLK_FMAX,
1889 OD8_POWER_PERCENTAGE,
1890 OD8_FAN_MIN_SPEED, //10
1891 OD8_FAN_ACOUSTIC_LIMIT,
1892 OD8_FAN_TARGET_TEMP,
1893 OD8_OPERATING_TEMP_MAX,
1894 OD8_AC_TIMING,
1895 OD8_FAN_ZERORPM_CONTROL,
1896 OD8_AUTO_UV_ENGINE_CONTROL,
1897 OD8_AUTO_OC_ENGINE_CONTROL,
1898 OD8_AUTO_OC_MEMORY_CONTROL,
1899 OD8_FAN_CURVE_TEMPERATURE_1,
1900 OD8_FAN_CURVE_SPEED_1, //20
1901 OD8_FAN_CURVE_TEMPERATURE_2,
1902 OD8_FAN_CURVE_SPEED_2,
1903 OD8_FAN_CURVE_TEMPERATURE_3,
1904 OD8_FAN_CURVE_SPEED_3,
1905 OD8_FAN_CURVE_TEMPERATURE_4,
1906 OD8_FAN_CURVE_SPEED_4,
1907 OD8_FAN_CURVE_TEMPERATURE_5,
1908 OD8_FAN_CURVE_SPEED_5,
1909 OD8_WS_FAN_AUTO_FAN_ACOUSTIC_LIMIT,
1910 OD8_GFXCLK_CURVE_COEFFICIENT_A, // 30 As part of the agreement with UI team, the min/max voltage limits for the
1911 OD8_GFXCLK_CURVE_COEFFICIENT_B, // quadratic curve graph will be stored in the min and max limits of
1912 OD8_GFXCLK_CURVE_COEFFICIENT_C, // coefficient a, b and c. A, b and c themselves do not have limits.
1913 OD8_GFXCLK_CURVE_VFT_FMIN,
1914 OD8_UCLK_FMIN,
1915 OD8_FAN_ZERO_RPM_STOP_TEMPERATURE,
1916 OD8_OPTIMZED_POWER_MODE,
1917 OD8_OD_VOLTAGE,// RSX - voltage offset feature
1918 OD8_ADV_OC_LIMITS_SETTING,
1919 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1,
1920 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2, //40
1921 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3,
1922 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4,
1923 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5,
1924 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6,
1925 OD8_AUTO_CURVE_OPTIMIZER_SETTING,
1926 OD8_GFX_VOLTAGE_LIMIT_SETTING,
1927 OD8_TDC_PERCENTAGE,
1928 OD8_FULL_CONTROL_MODE_SETTING,
1929 OD8_FULL_CONTROL_MODE_GFXCLK,
1930 OD8_FULL_CONTROL_MODE_UCLK, // 50,
1931 OD8_IDLE_POWER_SAVING_FEATURE_CONTROL,
1932 OD8_RUNTIME_POWER_SAVING_FEATURE_CONTROL,
1933 OD8_FULL_CONTROL_MODE_FEATURE_CONTROL,
1934 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_FREQ_ANCHOR_1,
1935 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_FREQ_ANCHOR_2,
1936 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_FREQ_ANCHOR_3,
1937 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_FREQ_ANCHOR_4,
1938 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_FREQ_ANCHOR_5,
1939 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_FREQ_ANCHOR_6,
1940 OD8_PER_ZONE_GFX_VOLTAGE_OFFSET_VOLTAGE_LIMIT, //60
1941 OD8_ACTIMING_PARAMETER_TRRDS,
1942 OD8_ACTIMING_PARAMETER_TCL,
1943 OD8_ACTIMING_PARAMETER_TCWL,
1944 OD8_ACTIMING_PARAMETER_TRCDRD,
1945 OD8_ACTIMING_PARAMETER_TRCDWR,
1946 OD8_ACTIMING_PARAMETER_TRAS,
1947 OD8_ACTIMING_PARAMETER_TRPAB,
1948 OD8_ACTIMING_PARAMETER_TRFC,
1949 OD8_ACTIMING_PARAMETER_TRFCPB,
1950 OD8_ACTIMING_PARAMETER_TRREFD, //70
1951 OD8_ACTIMING_PARAMETER_TREF,
1952 OD8_ACTIMING_PARAMETER_TWR,
1953 OD8_ACTIMING_PARAMETER_TWTRS,
1954 OD8_OVERDRIVE_INTERFACE_ID, //74
1955 OD8_AUTO_UV_ENGINE_V2_ID, //75
1956 OD8_POWER_GAUGE,
1957 OD8_COUNT
1958} ADLOD8SettingId;
1959
1960
1961//Define Performance Metrics Log max sensors number
1962#define ADL_PMLOG_MAX_SENSORS 256
1963
1964/// \deprecated Replaced with ADL_PMLOG_SENSORS
1965typedef enum ADLSensorType
1966{
1967 SENSOR_MAXTYPES = 0,
1968 PMLOG_CLK_GFXCLK = 1, // Current graphic clock value in MHz
1969 PMLOG_CLK_MEMCLK = 2, // Current memory clock value in MHz
1970 PMLOG_CLK_SOCCLK = 3,
1971 PMLOG_CLK_UVDCLK1 = 4,
1972 PMLOG_CLK_UVDCLK2 = 5,
1973 PMLOG_CLK_VCECLK = 6,
1974 PMLOG_CLK_VCNCLK = 7,
1975 PMLOG_TEMPERATURE_EDGE = 8, // Current edge of the die temperature value in C
1976 PMLOG_TEMPERATURE_MEM = 9,
1977 PMLOG_TEMPERATURE_VRVDDC = 10,
1978 PMLOG_TEMPERATURE_VRMVDD = 11,
1979 PMLOG_TEMPERATURE_LIQUID = 12,
1980 PMLOG_TEMPERATURE_PLX = 13,
1981 PMLOG_FAN_RPM = 14, // Current fan RPM value
1982 PMLOG_FAN_PERCENTAGE = 15, // Current ratio of fan RPM and max RPM
1983 PMLOG_SOC_VOLTAGE = 16,
1984 PMLOG_SOC_POWER = 17,
1985 PMLOG_SOC_CURRENT = 18,
1986 PMLOG_INFO_ACTIVITY_GFX = 19, // Current graphic activity level in percentage
1987 PMLOG_INFO_ACTIVITY_MEM = 20, // Current memory activity level in percentage
1988 PMLOG_GFX_VOLTAGE = 21, // Current graphic voltage in mV
1989 PMLOG_MEM_VOLTAGE = 22,
1990 PMLOG_ASIC_POWER = 23, // Current ASIC power draw in Watt
1991 PMLOG_TEMPERATURE_VRSOC = 24,
1992 PMLOG_TEMPERATURE_VRMVDD0 = 25,
1993 PMLOG_TEMPERATURE_VRMVDD1 = 26,
1994 PMLOG_TEMPERATURE_HOTSPOT = 27, // Current center of the die temperature value in C
1995 PMLOG_TEMPERATURE_GFX = 28,
1996 PMLOG_TEMPERATURE_SOC = 29,
1997 PMLOG_GFX_POWER = 30,
1998 PMLOG_GFX_CURRENT = 31,
1999 PMLOG_TEMPERATURE_CPU = 32,
2000 PMLOG_CPU_POWER = 33,
2001 PMLOG_CLK_CPUCLK = 34,
2002 PMLOG_THROTTLER_STATUS = 35, // A bit map of GPU throttle information. If a bit is set, the bit represented type of thorttling occurred in the last metrics sampling period
2003 PMLOG_CLK_VCN1CLK1 = 36,
2004 PMLOG_CLK_VCN1CLK2 = 37,
2005 PMLOG_SMART_POWERSHIFT_CPU = 38,
2006 PMLOG_SMART_POWERSHIFT_DGPU = 39,
2007 PMLOG_BUS_SPEED = 40, // Current PCIE bus speed running
2008 PMLOG_BUS_LANES = 41, // Current PCIE bus lanes using
2009 PMLOG_TEMPERATURE_LIQUID0 = 42,
2010 PMLOG_TEMPERATURE_LIQUID1 = 43,
2011 PMLOG_CLK_FCLK = 44,
2012 PMLOG_THROTTLER_STATUS_CPU = 45,
2013 PMLOG_SSPAIRED_ASICPOWER = 46, // apuPower
2014 PMLOG_SSTOTAL_POWERLIMIT = 47, // Total Power limit
2015 PMLOG_SSAPU_POWERLIMIT = 48, // APU Power limit
2016 PMLOG_SSDGPU_POWERLIMIT = 49, // DGPU Power limit
2017 PMLOG_TEMPERATURE_HOTSPOT_GCD = 50,
2018 PMLOG_TEMPERATURE_HOTSPOT_MCD = 51,
2019 PMLOG_THROTTLE_PERCENTAGE_TEMP_GFX = 52,
2020 PMLOG_THROTTLE_PERCENTAGE_TEMP_MEM = 53,
2021 PMLOG_THROTTLE_PERCENTAGE_TEMP_VR = 54,
2022 PMLOG_THROTTLE_PERCENTAGE_POWER = 55,
2023 PMLOG_THROTTLE_PERCENTAGE_TDC = 56,
2024 PMLOG_THROTTLE_PERCENTAGE_VMAX = 57,
2025 PMLOG_BUS_CURR_MAX_SPEED = 58,
2026 PMLOG_RESERVED_1 = 59, //Currently Unused
2027 PMLOG_RESERVED_2 = 60, //Currently Unused
2028 PMLOG_RESERVED_3 = 61, //Currently Unused
2029 PMLOG_RESERVED_4 = 62, //Currently Unused
2030 PMLOG_RESERVED_5 = 63, //Currently Unused
2031 PMLOG_RESERVED_6 = 64, //Currently Unused
2032 PMLOG_RESERVED_7 = 65, //Currently Unused
2033 PMLOG_RESERVED_8 = 66, //Currently Unused
2034 PMLOG_RESERVED_9 = 67, //Currently Unused
2035 PMLOG_RESERVED_10 = 68, //Currently Unused
2036 PMLOG_RESERVED_11 = 69, //Currently Unused
2037 PMLOG_RESERVED_12 = 70, //Currently Unused
2038 PMLOG_RESERVED_13 = 71, //Currently Unused
2039 PMLOG_RESERVED_14 = 72,
2040 PMLOG_BOARD_POWER = 73,
2041 PMLOG_MAX_SENSORS_REAL
2042} ADLSensorType;
2043
2044
2045//Throttle Status
2046typedef enum ADL_THROTTLE_NOTIFICATION
2047{
2048 ADL_PMLOG_THROTTLE_POWER = 1 << 0,
2049 ADL_PMLOG_THROTTLE_THERMAL = 1 << 1,
2050 ADL_PMLOG_THROTTLE_CURRENT = 1 << 2,
2051} ADL_THROTTLE_NOTIFICATION;
2052
2053typedef enum ADL_PMLOG_SENSORS
2054{
2055 ADL_SENSOR_MAXTYPES = 0,
2056 ADL_PMLOG_CLK_GFXCLK = 1,
2057 ADL_PMLOG_CLK_MEMCLK = 2,
2058 ADL_PMLOG_CLK_SOCCLK = 3,
2059 ADL_PMLOG_CLK_UVDCLK1 = 4,
2060 ADL_PMLOG_CLK_UVDCLK2 = 5,
2061 ADL_PMLOG_CLK_VCECLK = 6,
2062 ADL_PMLOG_CLK_VCNCLK = 7,
2063 ADL_PMLOG_TEMPERATURE_EDGE = 8,
2064 ADL_PMLOG_TEMPERATURE_MEM = 9,
2065 ADL_PMLOG_TEMPERATURE_VRVDDC = 10,
2066 ADL_PMLOG_TEMPERATURE_VRMVDD = 11,
2067 ADL_PMLOG_TEMPERATURE_LIQUID = 12,
2068 ADL_PMLOG_TEMPERATURE_PLX = 13,
2069 ADL_PMLOG_FAN_RPM = 14,
2070 ADL_PMLOG_FAN_PERCENTAGE = 15,
2071 ADL_PMLOG_SOC_VOLTAGE = 16,
2072 ADL_PMLOG_SOC_POWER = 17,
2073 ADL_PMLOG_SOC_CURRENT = 18,
2074 ADL_PMLOG_INFO_ACTIVITY_GFX = 19,
2075 ADL_PMLOG_INFO_ACTIVITY_MEM = 20,
2076 ADL_PMLOG_GFX_VOLTAGE = 21,
2077 ADL_PMLOG_MEM_VOLTAGE = 22,
2078 ADL_PMLOG_ASIC_POWER = 23,
2079 ADL_PMLOG_TEMPERATURE_VRSOC = 24,
2080 ADL_PMLOG_TEMPERATURE_VRMVDD0 = 25,
2081 ADL_PMLOG_TEMPERATURE_VRMVDD1 = 26,
2082 ADL_PMLOG_TEMPERATURE_HOTSPOT = 27,
2083 ADL_PMLOG_TEMPERATURE_GFX = 28,
2084 ADL_PMLOG_TEMPERATURE_SOC = 29,
2085 ADL_PMLOG_GFX_POWER = 30,
2086 ADL_PMLOG_GFX_CURRENT = 31,
2087 ADL_PMLOG_TEMPERATURE_CPU = 32,
2088 ADL_PMLOG_CPU_POWER = 33,
2089 ADL_PMLOG_CLK_CPUCLK = 34,
2090 ADL_PMLOG_THROTTLER_STATUS = 35, // GFX
2091 ADL_PMLOG_CLK_VCN1CLK1 = 36,
2092 ADL_PMLOG_CLK_VCN1CLK2 = 37,
2093 ADL_PMLOG_SMART_POWERSHIFT_CPU = 38,
2094 ADL_PMLOG_SMART_POWERSHIFT_DGPU = 39,
2095 ADL_PMLOG_BUS_SPEED = 40,
2096 ADL_PMLOG_BUS_LANES = 41,
2097 ADL_PMLOG_TEMPERATURE_LIQUID0 = 42,
2098 ADL_PMLOG_TEMPERATURE_LIQUID1 = 43,
2099 ADL_PMLOG_CLK_FCLK = 44,
2100 ADL_PMLOG_THROTTLER_STATUS_CPU = 45,
2101 ADL_PMLOG_SSPAIRED_ASICPOWER = 46, // apuPower
2102 ADL_PMLOG_SSTOTAL_POWERLIMIT = 47, // Total Power limit
2103 ADL_PMLOG_SSAPU_POWERLIMIT = 48, // APU Power limit
2104 ADL_PMLOG_SSDGPU_POWERLIMIT = 49, // DGPU Power limit
2105 ADL_PMLOG_TEMPERATURE_HOTSPOT_GCD = 50,
2106 ADL_PMLOG_TEMPERATURE_HOTSPOT_MCD = 51,
2107 ADL_PMLOG_THROTTLE_PERCENTAGE_TEMP_GFX = 52,
2108 ADL_PMLOG_THROTTLE_PERCENTAGE_TEMP_MEM = 53,
2109 ADL_PMLOG_THROTTLE_PERCENTAGE_TEMP_VR = 54,
2110 ADL_PMLOG_THROTTLE_PERCENTAGE_POWER = 55,
2111 ADL_PMLOG_THROTTLE_PERCENTAGE_TDC = 56,
2112 ADL_PMLOG_THROTTLE_PERCENTAGE_VMAX = 57,
2113 ADL_PMLOG_BUS_CURR_MAX_SPEED = 58,
2114 ADL_PMLOG_RESERVED_1 = 59, //Currently Unused
2115 ADL_PMLOG_RESERVED_2 = 60, //Currently Unused
2116 ADL_PMLOG_RESERVED_3 = 61, //Currently Unused
2117 ADL_PMLOG_RESERVED_4 = 62, //Currently Unused
2118 ADL_PMLOG_RESERVED_5 = 63, //Currently Unused
2119 ADL_PMLOG_RESERVED_6 = 64, //Currently Unused
2120 ADL_PMLOG_RESERVED_7 = 65, //Currently Unused
2121 ADL_PMLOG_RESERVED_8 = 66, //Currently Unused
2122 ADL_PMLOG_RESERVED_9 = 67, //Currently Unused
2123 ADL_PMLOG_RESERVED_10 = 68, //Currently Unused
2124 ADL_PMLOG_RESERVED_11 = 69, //Currently Unused
2125 ADL_PMLOG_RESERVED_12 = 70, //Currently Unused
2126 ADL_PMLOG_CLK_NPUCLK = 71, //NPU frequency
2127 ADL_PMLOG_NPU_BUSY_AVG = 72, //NPU busy
2128 ADL_PMLOG_BOARD_POWER = 73,
2129 ADL_PMLOG_TEMPERATURE_INTAKE = 74,
2130 ADL_PMLOG_MAX_SENSORS_REAL
2131} ADL_PMLOG_SENSORS;
2132
2133/// \defgroup define_ecc_mode_states
2134/// These defines the ECC(Error Correction Code) state. It is used by \ref ADL_Workstation_ECC_Get,ADL_Workstation_ECC_Set
2135/// @{
2136/// Error Correction is OFF.
2137#define ECC_MODE_OFF 0
2138/// Error Correction is ECCV2.
2139#define ECC_MODE_ON 2
2140/// Error Correction is HBM.
2141#define ECC_MODE_HBM 3
2142/// @}
2143
2144/// \defgroup define_board_layout_flags
2145/// These defines are the board layout flags state which indicates what are the valid properties of \ref ADLBoardLayoutInfo . It is used by \ref ADL_Adapter_BoardLayout_Get
2146/// @{
2147/// Indicates the number of slots is valid.
2148#define ADL_BLAYOUT_VALID_NUMBER_OF_SLOTS 0x1
2149/// Indicates the slot sizes are valid. Size of the slot consists of the length and width.
2150#define ADL_BLAYOUT_VALID_SLOT_SIZES 0x2
2151/// Indicates the connector offsets are valid.
2152#define ADL_BLAYOUT_VALID_CONNECTOR_OFFSETS 0x4
2153/// Indicates the connector lengths is valid.
2154#define ADL_BLAYOUT_VALID_CONNECTOR_LENGTHS 0x8
2155/// @}
2156
2157/// \defgroup define_max_constants
2158/// These defines are the maximum value constants.
2159/// @{
2160/// Indicates the Maximum supported slots on board.
2161#define ADL_ADAPTER_MAX_SLOTS 4
2162/// Indicates the Maximum supported connectors on slot.
2163#define ADL_ADAPTER_MAX_CONNECTORS 10
2164/// Indicates the Maximum supported properties of connection
2165#define ADL_MAX_CONNECTION_TYPES 32
2166/// Indicates the Maximum relative address link count.
2167#define ADL_MAX_RELATIVE_ADDRESS_LINK_COUNT 15
2168/// Indicates the Maximum size of EDID data block size
2169#define ADL_MAX_DISPLAY_EDID_DATA_SIZE 1024
2170/// Indicates the Maximum count of Error Records.
2171#define ADL_MAX_ERROR_RECORDS_COUNT 256
2172/// Indicates the maximum number of power states supported
2173#define ADL_MAX_POWER_POLICY 6
2174/// @}
2175
2176/// \defgroup define_connection_types
2177/// These defines are the connection types constants which indicates what are the valid connection type of given connector. It is used by \ref ADL_Adapter_SupportedConnections_Get
2178/// @{
2179/// Indicates the VGA connection type is valid.
2180#define ADL_CONNECTION_TYPE_VGA 0
2181/// Indicates the DVI_I connection type is valid.
2182#define ADL_CONNECTION_TYPE_DVI 1
2183/// Indicates the DVI_SL connection type is valid.
2184#define ADL_CONNECTION_TYPE_DVI_SL 2
2185/// Indicates the HDMI connection type is valid.
2186#define ADL_CONNECTION_TYPE_HDMI 3
2187/// Indicates the DISPLAY PORT connection type is valid.
2188#define ADL_CONNECTION_TYPE_DISPLAY_PORT 4
2189/// Indicates the Active dongle DP->DVI(single link) connection type is valid.
2190#define ADL_CONNECTION_TYPE_ACTIVE_DONGLE_DP_DVI_SL 5
2191/// Indicates the Active dongle DP->DVI(double link) connection type is valid.
2192#define ADL_CONNECTION_TYPE_ACTIVE_DONGLE_DP_DVI_DL 6
2193/// Indicates the Active dongle DP->HDMI connection type is valid.
2194#define ADL_CONNECTION_TYPE_ACTIVE_DONGLE_DP_HDMI 7
2195/// Indicates the Active dongle DP->VGA connection type is valid.
2196#define ADL_CONNECTION_TYPE_ACTIVE_DONGLE_DP_VGA 8
2197/// Indicates the Passive dongle DP->HDMI connection type is valid.
2198#define ADL_CONNECTION_TYPE_PASSIVE_DONGLE_DP_HDMI 9
2199/// Indicates the Active dongle DP->VGA connection type is valid.
2200#define ADL_CONNECTION_TYPE_PASSIVE_DONGLE_DP_DVI 10
2201/// Indicates the MST type is valid.
2202#define ADL_CONNECTION_TYPE_MST 11
2203/// Indicates the active dongle, all types.
2204#define ADL_CONNECTION_TYPE_ACTIVE_DONGLE 12
2205/// Indicates the Virtual Connection Type.
2206#define ADL_CONNECTION_TYPE_VIRTUAL 13
2207/// Macros for generating bitmask from index.
2208#define ADL_CONNECTION_BITMAST_FROM_INDEX(index) (1 << index)
2209/// @}
2210
2211/// \defgroup define_connection_properties
2212/// These defines are the connection properties which indicates what are the valid properties of given connection type. It is used by \ref ADL_Adapter_SupportedConnections_Get
2213/// @{
2214/// Indicates the property Bitrate is valid.
2215#define ADL_CONNECTION_PROPERTY_BITRATE 0x1
2216/// Indicates the property number of lanes is valid.
2217#define ADL_CONNECTION_PROPERTY_NUMBER_OF_LANES 0x2
2218/// Indicates the property 3D caps is valid.
2219#define ADL_CONNECTION_PROPERTY_3DCAPS 0x4
2220/// Indicates the property output bandwidth is valid.
2221#define ADL_CONNECTION_PROPERTY_OUTPUT_BANDWIDTH 0x8
2222/// Indicates the property colordepth is valid.
2223#define ADL_CONNECTION_PROPERTY_COLORDEPTH 0x10
2224/// @}
2225
2226/// \defgroup define_lanecount_constants
2227/// These defines are the Lane count constants which will be used in DP & etc.
2228/// @{
2229/// Indicates if lane count is unknown
2230#define ADL_LANECOUNT_UNKNOWN 0
2231/// Indicates if lane count is 1
2232#define ADL_LANECOUNT_ONE 1
2233/// Indicates if lane count is 2
2234#define ADL_LANECOUNT_TWO 2
2235/// Indicates if lane count is 4
2236#define ADL_LANECOUNT_FOUR 4
2237/// Indicates if lane count is 8
2238#define ADL_LANECOUNT_EIGHT 8
2239/// Indicates default value of lane count
2240#define ADL_LANECOUNT_DEF ADL_LANECOUNT_FOUR
2241/// @}
2242
2243/// \defgroup define_linkrate_constants
2244/// These defines are the link rate constants which will be used in DP & etc.
2245/// @{
2246/// Indicates if link rate is unknown
2247#define ADL_LINK_BITRATE_UNKNOWN 0
2248/// Indicates if link rate is 1.62Ghz
2249#define ADL_LINK_BITRATE_1_62_GHZ 0x06
2250/// Indicates if link rate is 2.7Ghz
2251#define ADL_LINK_BITRATE_2_7_GHZ 0x0A
2252/// Indicates if link rate is 5.4Ghz
2253#define ADL_LINK_BITRATE_5_4_GHZ 0x14
2254
2255/// Indicates if link rate is 8.1Ghz
2256#define ADL_LINK_BITRATE_8_1_GHZ 0x1E
2257/// Indicates default value of link rate
2258#define ADL_LINK_BITRATE_DEF ADL_LINK_BITRATE_2_7_GHZ
2259/// @}
2260
2261/// \defgroup define_colordepth_constants
2262/// These defines are the color depth constants which will be used in DP & etc.
2263/// @{
2264#define ADL_CONNPROP_S3D_ALTERNATE_TO_FRAME_PACK 0x00000001
2265/// @}
2266
2267
2268/// \defgroup define_colordepth_constants
2269/// These defines are the color depth constants which will be used in DP & etc.
2270/// @{
2271/// Indicates if color depth is unknown
2272#define ADL_COLORDEPTH_UNKNOWN 0
2273/// Indicates if color depth is 666
2274#define ADL_COLORDEPTH_666 1
2275/// Indicates if color depth is 888
2276#define ADL_COLORDEPTH_888 2
2277/// Indicates if color depth is 101010
2278#define ADL_COLORDEPTH_101010 3
2279/// Indicates if color depth is 121212
2280#define ADL_COLORDEPTH_121212 4
2281/// Indicates if color depth is 141414
2282#define ADL_COLORDEPTH_141414 5
2283/// Indicates if color depth is 161616
2284#define ADL_COLORDEPTH_161616 6
2285/// Indicates default value of color depth
2286#define ADL_COLOR_DEPTH_DEF ADL_COLORDEPTH_888
2287/// @}
2288
2289
2290/// \defgroup define_emulation_status
2291/// These defines are the status of emulation
2292/// @{
2293/// Indicates if real device is connected.
2294#define ADL_EMUL_STATUS_REAL_DEVICE_CONNECTED 0x1
2295/// Indicates if emulated device is presented.
2296#define ADL_EMUL_STATUS_EMULATED_DEVICE_PRESENT 0x2
2297/// Indicates if emulated device is used.
2298#define ADL_EMUL_STATUS_EMULATED_DEVICE_USED 0x4
2299/// In case when last active real/emulated device used (when persistence is enabled but no emulation enforced then persistence will use last connected/emulated device).
2300#define ADL_EMUL_STATUS_LAST_ACTIVE_DEVICE_USED 0x8
2301/// @}
2302
2303/// \defgroup define_emulation_mode
2304/// These defines are the modes of emulation
2305/// @{
2306/// Indicates if no emulation is used
2307#define ADL_EMUL_MODE_OFF 0
2308/// Indicates if emulation is used when display connected
2309#define ADL_EMUL_MODE_ON_CONNECTED 1
2310/// Indicates if emulation is used when display dis connected
2311#define ADL_EMUL_MODE_ON_DISCONNECTED 2
2312/// Indicates if emulation is used always
2313#define ADL_EMUL_MODE_ALWAYS 3
2314/// @}
2315
2316/// \defgroup define_emulation_query
2317/// These defines are the modes of emulation
2318/// @{
2319/// Indicates Data from real device
2320#define ADL_QUERY_REAL_DATA 0
2321/// Indicates Emulated data
2322#define ADL_QUERY_EMULATED_DATA 1
2323/// Indicates Data currently in use
2324#define ADL_QUERY_CURRENT_DATA 2
2325/// @}
2326
2327/// \defgroup define_persistence_state
2328/// These defines are the states of persistence
2329/// @{
2330/// Indicates persistence is disabled
2331#define ADL_EDID_PERSISTANCE_DISABLED 0
2332/// Indicates persistence is enabled
2333#define ADL_EDID_PERSISTANCE_ENABLED 1
2334/// @}
2335
2336/// \defgroup define_connector_types Connector Type
2337/// defines for ADLConnectorInfo.iType
2338/// @{
2339/// Indicates unknown Connector type
2340#define ADL_CONNECTOR_TYPE_UNKNOWN 0
2341/// Indicates VGA Connector type
2342#define ADL_CONNECTOR_TYPE_VGA 1
2343/// Indicates DVI-D Connector type
2344#define ADL_CONNECTOR_TYPE_DVI_D 2
2345/// Indicates DVI-I Connector type
2346#define ADL_CONNECTOR_TYPE_DVI_I 3
2347/// Indicates Active Dongle-NA Connector type
2348#define ADL_CONNECTOR_TYPE_ATICVDONGLE_NA 4
2349/// Indicates Active Dongle-JP Connector type
2350#define ADL_CONNECTOR_TYPE_ATICVDONGLE_JP 5
2351/// Indicates Active Dongle-NONI2C Connector type
2352#define ADL_CONNECTOR_TYPE_ATICVDONGLE_NONI2C 6
2353/// Indicates Active Dongle-NONI2C-D Connector type
2354#define ADL_CONNECTOR_TYPE_ATICVDONGLE_NONI2C_D 7
2355/// Indicates HDMI-Type A Connector type
2356#define ADL_CONNECTOR_TYPE_HDMI_TYPE_A 8
2357/// Indicates HDMI-Type B Connector type
2358#define ADL_CONNECTOR_TYPE_HDMI_TYPE_B 9
2359/// Indicates Display port Connector type
2360#define ADL_CONNECTOR_TYPE_DISPLAYPORT 10
2361/// Indicates EDP Connector type
2362#define ADL_CONNECTOR_TYPE_EDP 11
2363/// Indicates MiniDP Connector type
2364#define ADL_CONNECTOR_TYPE_MINI_DISPLAYPORT 12
2365/// Indicates Virtual Connector type
2366#define ADL_CONNECTOR_TYPE_VIRTUAL 13
2367/// Indicates USB type C Connector type
2368#define ADL_CONNECTOR_TYPE_USB_TYPE_C 14
2369/// @}
2370
2371/// \defgroup define_freesync_usecase
2372/// These defines are to specify use cases in which FreeSync should be enabled
2373/// They are a bit mask. To specify FreeSync for more than one use case, the input value
2374/// should be set to include multiple bits set
2375/// @{
2376/// Indicates FreeSync is enabled for Static Screen case
2377#define ADL_FREESYNC_USECASE_STATIC 0x1
2378/// Indicates FreeSync is enabled for Video use case
2379#define ADL_FREESYNC_USECASE_VIDEO 0x2
2380/// Indicates FreeSync is enabled for Gaming use case
2381#define ADL_FREESYNC_USECASE_GAMING 0x4
2382/// @}
2383
2384/// \defgroup define_freesync_caps
2385/// These defines are used to retrieve FreeSync display capabilities.
2386/// GPU support flag also indicates whether the display is
2387/// connected to a GPU that actually supports FreeSync
2388/// @{
2389#define ADL_FREESYNC_CAP_SUPPORTED (1 << 0)
2390#define ADL_FREESYNC_CAP_GPUSUPPORTED (1 << 1)
2391#define ADL_FREESYNC_CAP_DISPLAYSUPPORTED (1 << 2)
2392#define ADL_FREESYNC_CAP_CURRENTMODESUPPORTED (1 << 3)
2393#define ADL_FREESYNC_CAP_NOCFXORCFXSUPPORTED (1 << 4)
2394#define ADL_FREESYNC_CAP_NOGENLOCKORGENLOCKSUPPORTED (1 << 5)
2395#define ADL_FREESYNC_CAP_BORDERLESSWINDOWSUPPORTED (1 << 6)
2396/// @}
2397
2398/// \defgroup define_freesync_labelIndex
2399/// These defines are used to retrieve which FreeSync label to use
2400/// @{
2401#define ADL_FREESYNC_LABEL_UNSUPPORTED 0
2402#define ADL_FREESYNC_LABEL_FREESYNC 1
2403#define ADL_FREESYNC_LABEL_ADAPTIVE_SYNC 2
2404#define ADL_FREESYNC_LABEL_VRR 3
2405#define ADL_FREESYNC_LABEL_FREESYNC_PREMIUM 4
2406#define ADL_FREESYNC_LABEL_FREESYNC_PREMIUM_PRO 5
2407/// @}
2408
2409/// Freesync Power optimization masks
2410/// @{
2411#define ADL_FREESYNC_POWEROPTIMIZATION_SUPPORTED_MASK (1 << 0)
2412#define ADL_FREESYNC_POWEROPTIMIZATION_ENABLED_MASK (1 << 1)
2413#define ADL_FREESYNC_POWEROPTIMIZATION_DEFAULT_VALUE_MASK (1 << 2)
2414/// @}
2415
2416/// \defgroup define_MST_CommandLine_execute
2417/// @{
2418/// Indicates the MST command line for branch message if the bit is set. Otherwise, it is display message
2419#define ADL_MST_COMMANDLINE_PATH_MSG 0x1
2420/// Indicates the MST command line to send message in broadcast way it the bit is set
2421#define ADL_MST_COMMANDLINE_BROADCAST 0x2
2422
2423/// @}
2424
2425
2426/// \defgroup define_Adapter_CloneTypes_Get
2427/// @{
2428/// Indicates there is crossGPU clone with non-AMD dispalys
2429#define ADL_CROSSGPUDISPLAYCLONE_AMD_WITH_NONAMD 0x1
2430/// Indicates there is crossGPU clone
2431#define ADL_CROSSGPUDISPLAYCLONE 0x2
2432
2433
2434/// @}
2435
2436/// @}
2437
2438/// \defgroup define_D3DKMT_HANDLE
2439/// @{
2440/// Handle can be used to create Device Handle when using CreateDevice()
2441typedef unsigned int ADL_D3DKMT_HANDLE;
2442/// @}
2443
2444
2445// End Bracket for Constants and Definitions. Add new groups ABOVE this line!
2446
2447/// @}
2448
2449
2450typedef enum ADL_RAS_ERROR_INJECTION_MODE
2451{
2452 ADL_RAS_ERROR_INJECTION_MODE_SINGLE = 1,
2453 ADL_RAS_ERROR_INJECTION_MODE_MULTIPLE = 2
2454}ADL_RAS_ERROR_INJECTION_MODE;
2455
2456
2457typedef enum ADL_RAS_BLOCK_ID
2458{
2459 ADL_RAS_BLOCK_ID_UMC = 0,
2460 ADL_RAS_BLOCK_ID_SDMA,
2461 ADL_RAS_BLOCK_ID_GFX_HUB,
2462 ADL_RAS_BLOCK_ID_MMHUB,
2463 ADL_RAS_BLOCK_ID_ATHUB,
2464 ADL_RAS_BLOCK_ID_PCIE_BIF,
2465 ADL_RAS_BLOCK_ID_HDP,
2466 ADL_RAS_BLOCK_ID_XGMI_WAFL,
2467 ADL_RAS_BLOCK_ID_DF,
2468 ADL_RAS_BLOCK_ID_SMN,
2469 ADL_RAS_BLOCK_ID_SEM,
2470 ADL_RAS_BLOCK_ID_MP0,
2471 ADL_RAS_BLOCK_ID_MP1,
2472 ADL_RAS_BLOCK_ID_FUSE
2473}ADL_RAS_BLOCK_ID;
2474
2475typedef enum ADL_MEM_SUB_BLOCK_ID
2476{
2477 ADL_RAS__UMC_HBM = 0,
2478 ADL_RAS__UMC_SRAM = 1
2479}ADL_MEM_SUB_BLOCK_ID;
2480
2481typedef enum _ADL_RAS_ERROR_TYPE
2482{
2483 ADL_RAS_ERROR__NONE = 0,
2484 ADL_RAS_ERROR__PARITY = 1,
2485 ADL_RAS_ERROR__SINGLE_CORRECTABLE = 2,
2486 ADL_RAS_ERROR__PARITY_SINGLE_CORRECTABLE = 3,
2487 ADL_RAS_ERROR__MULTI_UNCORRECTABLE = 4,
2488 ADL_RAS_ERROR__PARITY_MULTI_UNCORRECTABLE = 5,
2489 ADL_RAS_ERROR__SINGLE_CORRECTABLE_MULTI_UNCORRECTABLE = 6,
2490 ADL_RAS_ERROR__PARITY_SINGLE_CORRECTABLE_MULTI_UNCORRECTABLE = 7,
2491 ADL_RAS_ERROR__POISON = 8,
2492 ADL_RAS_ERROR__PARITY_POISON = 9,
2493 ADL_RAS_ERROR__SINGLE_CORRECTABLE_POISON = 10,
2494 ADL_RAS_ERROR__PARITY_SINGLE_CORRECTABLE_POISON = 11,
2495 ADL_RAS_ERROR__MULTI_UNCORRECTABLE_POISON = 12,
2496 ADL_RAS_ERROR__PARITY_MULTI_UNCORRECTABLE_POISON = 13,
2497 ADL_RAS_ERROR__SINGLE_CORRECTABLE_MULTI_UNCORRECTABLE_POISON = 14,
2498 ADL_RAS_ERROR__PARITY_SINGLE_CORRECTABLE_MULTI_UNCORRECTABLE_POISON = 15
2499}ADL_RAS_ERROR_TYPE;
2500
2501typedef enum ADL_RAS_INJECTION_METHOD
2502{
2503 ADL_RAS_ERROR__UMC_METH_COHERENT = 0,
2504 ADL_RAS_ERROR__UMC_METH_SINGLE_SHOT = 1,
2505 ADL_RAS_ERROR__UMC_METH_PERSISTENT = 2,
2506 ADL_RAS_ERROR__UMC_METH_PERSISTENT_DISABLE = 3
2507}ADL_RAS_INJECTION_METHOD;
2508
2509// Driver event types
2510typedef enum ADL_DRIVER_EVENT_TYPE
2511{
2512 ADL_EVENT_ID_AUTO_FEATURE_COMPLETED = 30,
2513 ADL_EVENT_ID_FEATURE_AVAILABILITY = 31,
2514
2515} ADL_DRIVER_EVENT_TYPE;
2516
2517
2518//UIFeature Ids
2519typedef enum ADL_UIFEATURES_GROUP
2520{
2521 ADL_UIFEATURES_GROUP_DVR = 0,
2522 ADL_UIFEATURES_GROUP_TURBOSYNC = 1,
2523 ADL_UIFEATURES_GROUP_FRAMEMETRICSMONITOR = 2,
2524 ADL_UIFEATURES_GROUP_FRTC = 3,
2525 ADL_UIFEATURES_GROUP_XVISION = 4,
2526 ADL_UIFEATURES_GROUP_BLOCKCHAIN = 5,
2527 ADL_UIFEATURES_GROUP_GAMEINTELLIGENCE = 6,
2528 ADL_UIFEATURES_GROUP_CHILL = 7,
2529 ADL_UIFEATURES_GROUP_DELAG = 8,
2530 ADL_UIFEATURES_GROUP_BOOST = 9,
2531 ADL_UIFEATURES_GROUP_USU = 10,
2532 ADL_UIFEATURES_GROUP_XGMI = 11,
2533 ADL_UIFEATURES_GROUP_PROVSR = 12,
2534 ADL_UIFEATURES_GROUP_SMA = 13,
2535 ADL_UIFEATURES_GROUP_CAMERA = 14,
2536 ADL_UIFEATURES_GROUP_FRTCPRO = 15,
2537 ADL_UIFEATURES_GROUP_DELAGNEXT = 16,
2538 ADL_UIFEATURES_GROUP_RTBOOST = 17,
2539 ADL_UIFEATURES_GROUP_UAI = 18
2540
2541} ADL_UIFEATURES_GROUP;
2542
2543
2544
2545/// Maximum brightness supported by Radeon LED interface
2546#define ADL_RADEON_LED_MAX_BRIGHTNESS 2
2547
2548/// Maximum speed supported by Radeon LED interface
2549#define ADL_RADEON_LED_MAX_SPEED 4
2550
2551/// Maximum RGB supported by Radeon LED interface
2552#define ADL_RADEON_LED_MAX_RGB 255
2553
2554/// Maximum MORSE code supported string
2555#define ADL_RADEON_LED_MAX_MORSE_CODE 260
2556
2557/// Maximum LED ROW ON GRID
2558#define ADL_RADEON_LED_MAX_LED_ROW_ON_GRID 7
2559
2560/// Maximum LED COLUMN ON GRID
2561#define ADL_RADEON_LED_MAX_LED_COLUMN_ON_GRID 24
2562
2563/////////////////////////////////////////////////////////////////////////////////////////////
2564///\brief
2565///
2566///
2567///
2568///
2569/// \nosubgrouping
2570////////////////////////////////////////////////////////////////////////////////////////////
2571typedef enum ADL_RADEON_USB_LED_BAR_CONTROLS
2572{
2573 RadeonLEDBarControl_OFF = 0,
2574 RadeonLEDBarControl_Static,
2575 RadeonLEDBarControl_Rainbow,
2576 RadeonLEDBarControl_Swirl,
2577 RadeonLEDBarControl_Chase,
2578 RadeonLEDBarControl_Bounce,
2579 RadeonLEDBarControl_MorseCode,
2580 RadeonLEDBarControl_ColorCycle,
2581 RadeonLEDBarControl_Breathing,
2582 RadeonLEDBarControl_CustomPattern,
2583 RadeonLEDBarControl_MAX
2584}ADL_RADEON_USB_LED_BAR_CONTROLS;
2585
2586/////////////////////////////////////////////////////////////////////////////////////////////
2587///\brief
2588///
2589///
2590///
2591///
2592/// \nosubgrouping
2593////////////////////////////////////////////////////////////////////////////////////////////
2594typedef unsigned int RadeonLEDBARSupportedControl;
2595
2596
2597/////////////////////////////////////////////////////////////////////////////////////////////
2598///\brief
2599///
2600///
2601///
2602///
2603/// \nosubgrouping
2604////////////////////////////////////////////////////////////////////////////////////////////
2605typedef enum ADL_RADEON_USB_LED_CONTROL_CONFIGS
2606{
2607 RadeonLEDPattern_Speed = 0,
2608 RadeonLEDPattern_Brightness,
2609 RadeonLEDPattern_Direction,
2610 RadeonLEDPattern_Color,
2611 RadeonLEDPattern_MAX
2612}ADL_RADEON_USB_LED_CONTROL_CONFIGS;
2613
2614/////////////////////////////////////////////////////////////////////////////////////////////
2615///\brief
2616///
2617///
2618///
2619///
2620/// \nosubgrouping
2621////////////////////////////////////////////////////////////////////////////////////////////
2622typedef unsigned int RadeonLEDBARSupportedConfig;
2623
2624//User blob feature settings
2625typedef enum ADL_USER_SETTINGS
2626{
2627 ADL_USER_SETTINGS_ENHANCEDSYNC = 1 << 0, //notify Enhanced Sync settings change
2628 ADL_USER_SETTINGS_CHILL_PROFILE = 1 << 1, //notify Chill settings change
2629 ADL_USER_SETTINGS_DELAG_PROFILE = 1 << 2, //notify Delag settings change
2630 ADL_USER_SETTINGS_BOOST_PROFILE = 1 << 3, //notify Boost settings change
2631 ADL_USER_SETTINGS_USU_PROFILE = 1 << 4, //notify USU settings change
2632 ADL_USER_SETTINGS_CVDC_PROFILE = 1 << 5, //notify Color Vision Deficiency Corretion settings change
2633 ADL_USER_SETTINGS_SCE_PROFILE = 1 << 6,
2634 ADL_USER_SETTINGS_PROVSR = 1 << 7,
2635 ADL_USER_SETTINGS_RTBOOST_PROFILE=1 << 8,
2636 ADL_USER_SETTINGS_USU2_PROFILE = 1 << 9, //notify USU2 settings change
2637 } ADL_USER_SETTINGS;
2638
2639//FRAME_TIMESTAMPS_SHARED_MEMORY type
2640typedef enum FRAME_TIMESTAMPS_SHARED_MEMORY_TYPE
2641{
2642 FRAME_TIMESTAMPS_SHARED_MEMORY_TYPE_UNKNOWN = 0,
2643 FRAME_TIMESTAMPS_SHARED_MEMORY_TYPE_LEGACY,
2644 FRAME_TIMESTAMPS_SHARED_MEMORY_TYPE_INDEXED
2645}FRAME_TIMESTAMPS_SHARED_MEMORY_TYPE;
2646#define ADL_REG_DEVICE_FUNCTION_1 0x00000001
2647#endif /* ADL_DEFINES_H_ */
2648
2649