ohmu
·
2026-10-15
1#pragma once
2
3// DISCLAIMER:
4// THIS FILE IS CREATED FROM SCRATCH, BY READING THE OFFICIAL IGCL API
5// DOCUMENTATION REFERENCED BELOW, IN ORDER TO MAKE FASTFETCH MIT COMPLIANT.
6
7#include <stdint.h>
8#include <stdbool.h>
9
10// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv412ctl_result_t
11typedef enum ctl_result_t {
12 CTL_RESULT_SUCCESS = 0,
13} ctl_result_t;
14
15// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctl_application_id_t
16typedef struct ctl_application_id_t {
17 uint32_t Data1;
18 uint16_t Data2;
19 uint16_t Data3;
20 uint8_t Data4[8];
21} ctl_application_id_t;
22
23#define CTL_IMPL_VERSION ((1 /*major*/ << 16) | (1 /*minor*/ & 0x0000ffff))
24
25// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_init_flag_t
26typedef enum ctl_init_flag_t {
27 CTL_INIT_FLAG_USE_LEVEL_ZERO = 1,
28 CTL_INIT_FLAG_MAX
29} ctl_init_flag_t;
30
31typedef uint32_t ctl_version_info_t;
32
33// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_init_args_t
34typedef struct ctl_init_args_t {
35 uint32_t Size;
36 uint8_t Version;
37 ctl_version_info_t AppVersion;
38 ctl_init_flag_t flags;
39 ctl_version_info_t SupportedVersion;
40 ctl_application_id_t ApplicationUID;
41} ctl_init_args_t;
42
43typedef struct ctl_api_handle_t* ctl_api_handle_t;
44
45// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv47ctlInitP15ctl_init_args_tP16ctl_api_handle_t
46extern ctl_result_t ctlInit(ctl_init_args_t* pInitDesc, ctl_api_handle_t* phAPIHandle);
47// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlclose
48extern ctl_result_t ctlClose(ctl_api_handle_t hAPIHandle);
49
50typedef struct ctl_device_adapter_handle_t* ctl_device_adapter_handle_t;
51
52// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv419ctlEnumerateDevices16ctl_api_handle_tP8uint32_tP27ctl_device_adapter_handle_t
53extern ctl_result_t ctlEnumerateDevices(ctl_api_handle_t hAPIHandle, uint32_t* pCount, ctl_device_adapter_handle_t* phDevices);
54
55// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_device_type_t
56typedef enum ctl_device_type_t {
57 CTL_DEVICE_TYPE_GRAPHICS = 1,
58 CTL_DEVICE_TYPE_SYSTEM = 2,
59 CTL_DEVICE_TYPE_MAX
60} ctl_device_type_t;
61
62// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv422ctl_firmware_version_t
63typedef struct ctl_firmware_version_t {
64 uint64_t major_version;
65 uint64_t minor_version;
66 uint64_t build_number;
67} ctl_firmware_version_t;
68
69// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_adapter_bdf_t
70typedef struct ctl_adapter_bdf_t {
71 uint8_t bus;
72 uint8_t device;
73 uint8_t function;
74} ctl_adapter_bdf_t;
75
76#define IGCL_CTL_MAX_DEVICE_NAME_LEN 100
77#define IGCL_CTL_MAX_RESERVED_SIZE 108
78
79typedef enum ctl_adapter_properties_flag_t {
80 CTL_ADAPTER_PROPERTIES_FLAG_INTEGRATED = 1,
81} ctl_adapter_properties_flag_t;
82
83// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv431ctl_device_adapter_properties_t
84typedef struct ctl_device_adapter_properties_t {
85 uint32_t Size;
86 uint8_t Version;
87 void* pDeviceID;
88 uint32_t device_id_size;
89 ctl_device_type_t device_type;
90 uint32_t /*ctl_supported_functions_flags_t*/ supported_subfunction_flags;
91 uint64_t driver_version;
92 ctl_firmware_version_t firmware_version;
93 uint32_t pci_vendor_id;
94 uint32_t pci_device_id;
95 uint32_t rev_id;
96 uint32_t num_eus_per_sub_slice;
97 uint32_t num_sub_slices_per_slice;
98 uint32_t num_slices;
99 char name[IGCL_CTL_MAX_DEVICE_NAME_LEN];
100 ctl_adapter_properties_flag_t graphics_adapter_properties;
101 uint32_t Frequency;
102 uint16_t pci_subsys_id;
103 uint16_t pci_subsys_vendor_id;
104 ctl_adapter_bdf_t adapter_bdf;
105 uint32_t num_xe_cores;
106 char reserved[IGCL_CTL_MAX_RESERVED_SIZE];
107} ctl_device_adapter_properties_t;
108
109// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv422ctlGetDeviceProperties27ctl_device_adapter_handle_tP31ctl_device_adapter_properties_t
110extern ctl_result_t ctlGetDeviceProperties(ctl_device_adapter_handle_t hDAhandle, ctl_device_adapter_properties_t* pProperties);
111
112typedef struct ctl_temp_handle_t* ctl_temp_handle_t;
113
114// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlenumtemperaturesensors
115extern ctl_result_t ctlEnumTemperatureSensors(ctl_device_adapter_handle_t hDAhandle, uint32_t* pCount, ctl_temp_handle_t* phTemperature);
116// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv427ctlTemperatureGetProperties17ctl_temp_handle_tP21ctl_temp_properties_t
117
118typedef enum ctl_temp_sensors_t {
119 CTL_TEMP_SENSORS_GLOBAL = 0,
120 CTL_TEMP_SENSORS_GPU = 1,
121 CTL_TEMP_SENSORS_MEMORY = 2,
122 CTL_TEMP_SENSORS_GLOBAL_MIN = 3,
123 CTL_TEMP_SENSORS_GPU_MIN = 4,
124 CTL_TEMP_SENSORS_MEMORY_MIN = 5,
125 CTL_TEMP_SENSORS_MAX
126} ctl_temp_sensors_t;
127
128typedef struct _ctl_temp_properties_t {
129 uint32_t Size;
130 uint8_t Version;
131 ctl_temp_sensors_t type;
132 double maxTemperature;
133} ctl_temp_properties_t;
134
135extern ctl_result_t ctlTemperatureGetProperties(ctl_temp_handle_t hTemperature, ctl_temp_properties_t* pTemperature);
136// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctlEnumMemoryModules27ctl_device_adapter_handle_tP8uint32_tP16ctl_mem_handle_t
137
138typedef struct ctl_mem_handle_t* ctl_mem_handle_t;
139
140// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctlEnumMemoryModules27ctl_device_adapter_handle_tP8uint32_tP16ctl_mem_handle_t
141extern ctl_result_t ctlEnumMemoryModules(ctl_device_adapter_handle_t hDAhandle, uint32_t* pCount, ctl_mem_handle_t* phMemory);
142
143// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_mem_state_t
144typedef struct ctl_mem_state_t {
145 uint32_t Size;
146 uint8_t Version;
147 uint64_t free;
148 uint64_t size;
149} ctl_mem_state_t;
150
151// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctlMemoryGetState16ctl_mem_handle_tP15ctl_mem_state_t
152extern ctl_result_t ctlMemoryGetState(ctl_mem_handle_t hMemory, ctl_mem_state_t* pState);
153
154// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv414ctl_mem_type_t
155typedef enum ctl_mem_type_t {
156 CTL_MEM_TYPE_HBM = 0,
157 CTL_MEM_TYPE_DDR = 1,
158 CTL_MEM_TYPE_DDR3 = 2,
159 CTL_MEM_TYPE_DDR4 = 3,
160 CTL_MEM_TYPE_DDR5 = 4,
161 CTL_MEM_TYPE_LPDDR = 5,
162 CTL_MEM_TYPE_LPDDR3 = 6,
163 CTL_MEM_TYPE_LPDDR4 = 7,
164 CTL_MEM_TYPE_LPDDR5 = 8,
165 CTL_MEM_TYPE_GDDR4 = 9,
166 CTL_MEM_TYPE_GDDR5 = 10,
167 CTL_MEM_TYPE_GDDR5X = 11,
168 CTL_MEM_TYPE_GDDR6 = 12,
169 CTL_MEM_TYPE_GDDR6X = 13,
170 CTL_MEM_TYPE_GDDR7 = 14,
171 CTL_MEM_TYPE_MAX
172} ctl_mem_type_t;
173
174// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv413ctl_mem_loc_t
175typedef enum ctl_mem_loc_t {
176 CTL_MEM_LOC_SYSTEM = 0,
177 CTL_MEM_LOC_DEVICE = 1,
178 CTL_MEM_LOC_MAX
179} ctl_mem_loc_t;
180
181// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctl_mem_properties_t
182typedef struct ctl_mem_properties_t {
183 uint32_t Size;
184 uint8_t Version;
185 ctl_mem_type_t type;
186 ctl_mem_loc_t location;
187 uint64_t physicalSize;
188 int32_t busWidth;
189 int32_t numChannels;
190} ctl_mem_properties_t;
191
192// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv422ctlMemoryGetProperties16ctl_mem_handle_tP20ctl_mem_properties_t
193extern ctl_result_t ctlMemoryGetProperties(ctl_mem_handle_t hMemory, ctl_mem_properties_t* pProperties);
194
195typedef struct ctl_freq_handle_t* ctl_freq_handle_t;
196
197// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlenumfrequencydomains
198extern ctl_result_t ctlEnumFrequencyDomains(ctl_device_adapter_handle_t hDAhandle, uint32_t* pCount, ctl_freq_handle_t* phFrequency);
199
200// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_freq_domain_t
201typedef enum ctl_freq_domain_t {
202 CTL_FREQ_DOMAIN_GPU = 0,
203 CTL_FREQ_DOMAIN_MEMORY = 1,
204 CTL_FREQ_DOMAIN_MAX
205} ctl_freq_domain_t;
206
207// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv421ctl_freq_properties_t
208typedef struct ctl_freq_properties_t {
209 uint32_t Size;
210 uint8_t Version;
211 ctl_freq_domain_t type;
212 bool canControl;
213 double min;
214 double max;
215} ctl_freq_properties_t;
216
217// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv425ctlFrequencyGetProperties17ctl_freq_handle_tP21ctl_freq_properties_t
218extern ctl_result_t ctlFrequencyGetProperties(ctl_freq_handle_t hFrequency, ctl_freq_properties_t* pProperties);
219
220// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv415ctl_pci_speed_t
221typedef struct ctl_pci_speed_t {
222 uint32_t Size;
223 uint8_t Version;
224 int32_t gen;
225 int32_t width;
226 int64_t maxBandwidth;
227} ctl_pci_speed_t;
228
229// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv417ctl_pci_address_t
230typedef struct ctl_pci_address_t {
231 uint32_t Size;
232 uint8_t Version;
233 uint32_t domain;
234 uint32_t bus;
235 uint32_t device;
236 uint32_t function;
237} ctl_pci_address_t;
238
239// https://intel.github.io/drivers.gpu.control-library/Control/api.html#_CPPv420ctl_pci_properties_t
240typedef struct ctl_pci_properties_t {
241 uint32_t Size;
242 uint8_t Version;
243 ctl_pci_address_t address;
244 ctl_pci_speed_t maxSpeed;
245 bool resizable_bar_supported;
246 bool resizable_bar_enabled;
247} ctl_pci_properties_t;
248
249// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlpcigetproperties
250extern ctl_result_t ctlPciGetProperties(ctl_device_adapter_handle_t hDAhandle, ctl_pci_properties_t* pProperties);
251
252// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctl-pci-state-t
253typedef struct _ctl_pci_state_t {
254 uint32_t Size;
255 uint8_t Version;
256 ctl_pci_speed_t speed;
257} ctl_pci_state_t;
258
259// https://intel.github.io/drivers.gpu.control-library/Control/api.html#ctlpcigetstate
260extern ctl_result_t ctlPciGetState(ctl_device_adapter_handle_t hDAhandle, ctl_pci_state_t* pState);