1// References:
 2// https://github.com/NVIDIA/nvapi (MIT License)
 3// https://github.com/deathcamp/NVOC/blob/master/nvoc.c (Public Domain)
 4
 5typedef enum NvApiGPUMemoryType {
 6    NVAPI_GPU_MEMORY_TYPE_UNKNOWN = 0,
 7    NVAPI_GPU_MEMORY_TYPE_SDRAM,
 8    NVAPI_GPU_MEMORY_TYPE_DDR1,
 9    NVAPI_GPU_MEMORY_TYPE_DDR2,
10    NVAPI_GPU_MEMORY_TYPE_GDDR2,
11    NVAPI_GPU_MEMORY_TYPE_GDDR3,
12    NVAPI_GPU_MEMORY_TYPE_GDDR4,
13    NVAPI_GPU_MEMORY_TYPE_DDR3,
14    NVAPI_GPU_MEMORY_TYPE_GDDR5,
15    NVAPI_GPU_MEMORY_TYPE_LPDDR2,
16    NVAPI_GPU_MEMORY_TYPE_GDDR5X,
17    NVAPI_GPU_MEMORY_TYPE_LPDDR3,
18    NVAPI_GPU_MEMORY_TYPE_LPDDR4,
19    NVAPI_GPU_MEMORY_TYPE_LPDDR5,
20    NVAPI_GPU_MEMORY_TYPE_GDDR6,
21    NVAPI_GPU_MEMORY_TYPE_GDDR6X,
22    NVAPI_GPU_MEMORY_TYPE_GDDR7,
23} NvApiGPUMemoryType;
24
25typedef enum {
26    NV_SYSTEM_TYPE_GPU_UNKNOWN = 0,
27    NV_SYSTEM_TYPE_IGPU = 1, // Integrated
28    NV_SYSTEM_TYPE_DGPU = 2, // Discrete
29} NvApiGPUType;
30
31typedef int NvAPI_Status; // 0 = success; < 0 = error
32typedef struct NvPhysicalGpuHandle* NvPhysicalGpuHandle;
33
34typedef enum {
35    NVAPI_INTERFACE_OFFSET_INITIALIZE = 0x0150E828,
36    NVAPI_INTERFACE_OFFSET_UNLOAD = 0xD22BDD7E,
37    NVAPI_INTERFACE_OFFSET_ENUM_PHYSICAL_GPUS = 0xE5AC921F,
38    NVAPI_INTERFACE_OFFSET_GPU_GET_RAM_TYPE = 0x57F7CAAC,
39    NVAPI_INTERFACE_OFFSET_GPU_GET_GPU_TYPE = 0xC33BAEB1,
40
41    NVAPI_INTERFACE_OFFSET_FORCE_UINT32 = 0xFFFFFFFF
42} NvApiInterfaceOffsets;
43
44extern void* nvapi_QueryInterface(NvApiInterfaceOffsets offset);
45
46extern NvAPI_Status nvapi_Initialize(void);
47extern NvAPI_Status nvapi_Unload(void);
48extern NvAPI_Status nvapi_EnumPhysicalGPUs(NvPhysicalGpuHandle* handles, int* count);
49extern NvAPI_Status nvapi_GPU_GetRamType(NvPhysicalGpuHandle handle, NvApiGPUMemoryType* memtype);
50extern NvAPI_Status nvapi_GPU_GetGPUType(NvPhysicalGpuHandle handle, NvApiGPUType* gpuType);